search for: pxh

Displaying 9 results from an estimated 9 matches for "pxh".

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2005 Oct 04
3
Motherboards
Does anyone have any experience with Super-Micro brand motherboards // dual Xeon cpu's? Had to swap out my Tyan piece of junk and going back with the S-M board. I believe it has similar north/southbridge chips on it -- at least they are the intel MCH ICH5R and PXH plus the 82546GB. One area that the Tyan board was seriously lacking in was in the hardware monitoring department. The S-M board uses a winbond 83627HF chip. Another area I'm wondering about is with the SATA controller. Supposedly the ICH5R supports Raid 0, 1, and JBOD's, but does C...
2015 May 06
2
Mapping other Inbox method (symlink vs ACL)
...6P >>> -----END PGP SIGNATURE----- >> >> > > - -- Steffen Kaiser > -----BEGIN PGP SIGNATURE----- > Version: GnuPG v1 > > iQEVAwUBVUm+1Xz1H7kL/d9rAQKe6QgAnKH2zKVKZzfawIEwhpd4qY1fXP1dXNvA > Ymzsf4i2MSG2hg8d1Nw91kxPQxmamHq98HLgHFjWy9of/5zW8I23iOAjxgJMpypY > pXha/1T1W4rDoF7wnpHSWdkGtyFW4bQu3T1vNfU12bLw/d1ehdgcDjLHdYDncKyh > ZZdFQ2BpPYyiHs3+KnZVqixdFna9+lEMOMJddVI1+8dTfRf3JlfZptEbhOp501ko > w/slmqMzpZsx/+20QzI+pXh+jmQy0FFAJh8z0mWsnxdJqNbf9zSmSmvCy4lwirhL > Mht3x2mudhcGk5l3Z+R86QxJiElEWpzdFv0JJRQp1oRwljAncasCGA== > =cNmt > -----END PGP SIGNATU...
2015 May 06
2
Mapping other Inbox method (symlink vs ACL)
Dear Steffen, Thanks for your feedback. Appreciate it. By permission I mean (read, write, look-up seen). I dont think symlink will allow these features. ACL does support such features. Only problem is that I have to setacl for individual boxes (ie Inbox,Sent,Junk etc.) On Wed, May 6, 2015 at 1:15 PM, Steffen Kaiser <skdovecot at smail.inf.fh-brs.de> wrote: > -----BEGIN PGP SIGNED
2015 May 06
0
Mapping other Inbox method (symlink vs ACL)
...95MmT+B08M6ChNOuILTiYFlv0o/3G3Qt8qhqHhA== >> =Q36P >> -----END PGP SIGNATURE----- > - -- Steffen Kaiser -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEVAwUBVUm+1Xz1H7kL/d9rAQKe6QgAnKH2zKVKZzfawIEwhpd4qY1fXP1dXNvA Ymzsf4i2MSG2hg8d1Nw91kxPQxmamHq98HLgHFjWy9of/5zW8I23iOAjxgJMpypY pXha/1T1W4rDoF7wnpHSWdkGtyFW4bQu3T1vNfU12bLw/d1ehdgcDjLHdYDncKyh ZZdFQ2BpPYyiHs3+KnZVqixdFna9+lEMOMJddVI1+8dTfRf3JlfZptEbhOp501ko w/slmqMzpZsx/+20QzI+pXh+jmQy0FFAJh8z0mWsnxdJqNbf9zSmSmvCy4lwirhL Mht3x2mudhcGk5l3Z+R86QxJiElEWpzdFv0JJRQp1oRwljAncasCGA== =cNmt -----END PGP SIGNATURE-----
2015 May 06
0
Mapping other Inbox method (symlink vs ACL)
...--- >>> >>> >> >> - -- Steffen Kaiser >> -----BEGIN PGP SIGNATURE----- >> Version: GnuPG v1 >> >> iQEVAwUBVUm+1Xz1H7kL/d9rAQKe6QgAnKH2zKVKZzfawIEwhpd4qY1fXP1dXNvA >> Ymzsf4i2MSG2hg8d1Nw91kxPQxmamHq98HLgHFjWy9of/5zW8I23iOAjxgJMpypY >> pXha/1T1W4rDoF7wnpHSWdkGtyFW4bQu3T1vNfU12bLw/d1ehdgcDjLHdYDncKyh >> ZZdFQ2BpPYyiHs3+KnZVqixdFna9+lEMOMJddVI1+8dTfRf3JlfZptEbhOp501ko >> w/slmqMzpZsx/+20QzI+pXh+jmQy0FFAJh8z0mWsnxdJqNbf9zSmSmvCy4lwirhL >> Mht3x2mudhcGk5l3Z+R86QxJiElEWpzdFv0JJRQp1oRwljAncasCGA== >> =cNmt >>...
2009 Nov 13
11
scrub differs in execute time?
I have a raidz2 and did a scrub, it took 8h. Then I reconnected some drives to other SATA ports, and now it takes 15h to scrub?? Why is that? -- This message posted from opensolaris.org
2009 Jan 21
11
[PATCH] x86: change IO-APIC ack method default for single IO-APIC systems
Ever since 3.0.2 we''ve been carrying this patch in our products. Since there was no indication that there would be anything wrong with the ''new'' IO-APIC ack method added back then, we finally decided to drop this patch recently from SLE11, to find that the subsequent release candidate failed to work on at least on system without using "ioapic_ack=old". With
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...static void quirk_pcie_mch(struct pci_dev *pdev) { pci_msi_off(pdev); pdev->no_msi = 1; @@ -1575,7 +1575,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quir * It's possible for the MSI to get corrupted if shpc and acpi * are used together on certain PXH-based systems. */ -static void __devinit quirk_pcie_pxh(struct pci_dev *dev) +static void quirk_pcie_pxh(struct pci_dev *dev) { pci_msi_off(dev); dev->no_msi = 1; @@ -1777,7 +1777,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, qui * but the PIO transfe...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...static void quirk_pcie_mch(struct pci_dev *pdev) { pci_msi_off(pdev); pdev->no_msi = 1; @@ -1575,7 +1575,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_E7525_MCH, quir * It's possible for the MSI to get corrupted if shpc and acpi * are used together on certain PXH-based systems. */ -static void __devinit quirk_pcie_pxh(struct pci_dev *dev) +static void quirk_pcie_pxh(struct pci_dev *dev) { pci_msi_off(dev); dev->no_msi = 1; @@ -1777,7 +1777,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_SMBUS, qui * but the PIO transfe...