search for: pv_init_var

...size in x86-64. + */ +#if CONFIG_NR_CPUS >= (1 << 16) +#define _cpuid_t u32 +#else +#define _cpuid_t u16 +#endif + +struct pv_qvars { + u8 active; /* Set if CPU active */ + u8 prehead; /* Set if next to queue head */ + _cpuid_t nxtcpu_p1; /* CPU number of next node + 1 */ +}; + +/** + * pv_init_vars - initialize fields in struct pv_qvars + * @pv: pointer to struct pv_qvars + */ +static __always_inline void pv_init_vars(struct pv_qvars *pv) +{ + pv->active = false; + pv->prehead = false; + pv->nxtcpu_p1 = 0; +} + +/** + * head_spin_check - perform para-virtualization checks for q...

...e +#define _cpuid_t u16 +#endif + +struct qnode; + +struct pv_qvars { + s16 cpustate; /* CPU status flag */ + _cpuid_t nxtcpu_p1; /* CPU number of next node + 1 */ + _cpuid_t mycpu; /* CPU number of this node */ + struct qnode *prev; /* Pointer to previous node */ +}; + +/** + * pv_init_vars - initialize fields in struct pv_qvars + * @pv : pointer to struct pv_qvars + * @cpu: current CPU number + */ +static __always_inline void pv_init_vars(struct pv_qvars *pv, int cpu) +{ + pv->cpustate = PV_CPU_ACTIVE; + pv->prev = NULL; + pv->nxtcpu_p1 = 0; + pv->mycpu = cpu;...

...dummy[3]; /* 3 dummy MCS nodes */ + s8 cpustate; /* CPU status flag */ + s8 mayhalt; /* May be halted soon */ + u32 mycpu; /* CPU number of this node */ + struct pv_qnode *prev; /* Pointer to previous node */ +}; + +#define qhead mcs.locked /* Queue head flag */ + +/** + * pv_init_vars - initialize fields in struct pv_qnode + * @mcs: pointer to struct mcs_spinlock + * @cpu: current CPU number + */ +static inline void pv_init_vars(struct mcs_spinlock *node, int cpu) +{ + struct pv_qnode *pv = (struct pv_qnode *)node; + + BUILD_BUG_ON(sizeof(struct pv_qnode) > 5*sizeof(struct m...

...;< _Q_TAIL_CPU_BITS)); > > - if (trylock_pending(lock, &val)) > + if (trylock_pending(lock, val)) > return; /* Lock acquired */ > > node = this_cpu_ptr(&qnodes[0]); > @@ -859,11 +858,11 @@ void queue_spin_lock_slowpath(struct qspinlock *lock, u32 val) > pv_init_vars(&node->pv, cpu_nr); > > /* > - * We touched a (possibly) cold cacheline; attempt the trylock once > - * more in the hope someone let go while we weren't watching as long > - * as no one was queuing. > + * We touched a (possibly) cold cacheline in the per-cpu qu...

v4->v5: - Move the optimized 2-task contending code to the generic file to enable more architectures to use it without code duplication. - Address some of the style-related comments by PeterZ. - Allow the use of unfair queue spinlock in a real para-virtualized execution environment. - Add para-virtualization support to the qspinlock code by ensuring that the lock holder and queue

v4->v5: - Move the optimized 2-task contending code to the generic file to enable more architectures to use it without code duplication. - Address some of the style-related comments by PeterZ. - Allow the use of unfair queue spinlock in a real para-virtualized execution environment. - Add para-virtualization support to the qspinlock code by ensuring that the lock holder and queue

On 04/18/2014 05:40 PM, Waiman Long wrote: > On 04/18/2014 03:05 PM, Peter Zijlstra wrote: >> On Fri, Apr 18, 2014 at 01:52:50PM -0400, Waiman Long wrote: >>> I am confused by your notation. >> Nah, I think I was confused :-) Make the 1 _Q_LOCKED_VAL though, as >> that's the proper constant to use. > > Everyone gets confused once in a while:-) I have plenty

On 04/18/2014 05:40 PM, Waiman Long wrote: > On 04/18/2014 03:05 PM, Peter Zijlstra wrote: >> On Fri, Apr 18, 2014 at 01:52:50PM -0400, Waiman Long wrote: >>> I am confused by your notation. >> Nah, I think I was confused :-) Make the 1 _Q_LOCKED_VAL though, as >> that's the proper constant to use. > > Everyone gets confused once in a while:-) I have plenty

v4->v5: - Move the optimized 2-task contending code to the generic file to enable more architectures to use it without code duplication. - Address some of the style-related comments by PeterZ. - Allow the use of unfair queue spinlock in a real para-virtualized execution environment. - Add para-virtualization support to the qspinlock code by ensuring that the lock holder and queue

v4->v5: - Move the optimized 2-task contending code to the generic file to enable more architectures to use it without code duplication. - Address some of the style-related comments by PeterZ. - Allow the use of unfair queue spinlock in a real para-virtualized execution environment. - Add para-virtualization support to the qspinlock code by ensuring that the lock holder and queue

v5->v6: - Change the optimized 2-task contending code to make it fairer at the expense of a bit of performance. - Add a patch to support unfair queue spinlock for Xen. - Modify the PV qspinlock code to follow what was done in the PV ticketlock. - Add performance data for the unfair lock as well as the PV support code. v4->v5: - Move the optimized 2-task contending code to the

v5->v6: - Change the optimized 2-task contending code to make it fairer at the expense of a bit of performance. - Add a patch to support unfair queue spinlock for Xen. - Modify the PV qspinlock code to follow what was done in the PV ticketlock. - Add performance data for the unfair lock as well as the PV support code. v4->v5: - Move the optimized 2-task contending code to the

v6->v7: - Remove an atomic operation from the 2-task contending code - Shorten the names of some macros - Make the queue waiter to attempt to steal lock when unfair lock is enabled. - Remove lock holder kick from the PV code and fix a race condition - Run the unfair lock & PV code on overcommitted KVM guests to collect performance data. v5->v6: - Change the optimized

v6->v7: - Remove an atomic operation from the 2-task contending code - Shorten the names of some macros - Make the queue waiter to attempt to steal lock when unfair lock is enabled. - Remove lock holder kick from the PV code and fix a race condition - Run the unfair lock & PV code on overcommitted KVM guests to collect performance data. v5->v6: - Change the optimized

v10->v11: - Use a simple test-and-set unfair lock to simplify the code, but performance may suffer a bit for large guest with many CPUs. - Take out Raghavendra KT's test results as the unfair lock changes may render some of his results invalid. - Add PV support without increasing the size of the core queue node structure. - Other minor changes to address some of the

v10->v11: - Use a simple test-and-set unfair lock to simplify the code, but performance may suffer a bit for large guest with many CPUs. - Take out Raghavendra KT's test results as the unfair lock changes may render some of his results invalid. - Add PV support without increasing the size of the core queue node structure. - Other minor changes to address some of the

v7->v8: - Remove one unneeded atomic operation from the slowpath, thus improving performance. - Simplify some of the codes and add more comments. - Test for X86_FEATURE_HYPERVISOR CPU feature bit to enable/disable unfair lock. - Reduce unfair lock slowpath lock stealing frequency depending on its distance from the queue head. - Add performance data for IvyBridge-EX CPU.

v7->v8: - Remove one unneeded atomic operation from the slowpath, thus improving performance. - Simplify some of the codes and add more comments. - Test for X86_FEATURE_HYPERVISOR CPU feature bit to enable/disable unfair lock. - Reduce unfair lock slowpath lock stealing frequency depending on its distance from the queue head. - Add performance data for IvyBridge-EX CPU.

N.B. Sorry for the duplicate. This patch series were resent as the original one was rejected by the vger.kernel.org list server due to long header. There is no change in content. v7->v8: - Remove one unneeded atomic operation from the slowpath, thus improving performance. - Simplify some of the codes and add more comments. - Test for X86_FEATURE_HYPERVISOR CPU feature bit

N.B. Sorry for the duplicate. This patch series were resent as the original one was rejected by the vger.kernel.org list server due to long header. There is no change in content. v7->v8: - Remove one unneeded atomic operation from the slowpath, thus improving performance. - Simplify some of the codes and add more comments. - Test for X86_FEATURE_HYPERVISOR CPU feature bit