Displaying 3 results from an estimated 3 matches for "ptxisellowering".
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nvptxisellowering
2012 Jan 10
1
[LLVMdev] truncstore fails in PTX backend
From what I can tell, the truncstore paths all fail instruction selection in the current PTX backend. This is easy to work around for int types >= 16 bits by setting the truncstore action to expand in PTXISelLowering.cpp, but this cannot handle i8 values, since the PTX backend has no register representation for i8s. As a result of all this, it is not possible to store to i8 pointers at all.
PTX does support truncating stores, including to i8s. (ld/st and cvt are the only ops which work with i8 types.)
Is this...
2011 May 13
2
[LLVMdev] [LLVMDev] Add not instruction to PTX backend
Hi, Dan
Someone on the irc suggest me using custom lowering to do the mapping
correctly. But I am still trying to figure out how to do that.
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
2011 May 13
0
[LLVMdev] [LLVMDev] Add not instruction to PTX backend
...ote:
> Hi, Dan
>
> Someone on the irc suggest me using custom lowering to do the mapping
> correctly. But I am still trying to figure out how to do that.
>
Custom lowering means implementing the SelectionDAG instruction selection in
the C++ class instead of the TableGen file. See PTXISelLowering.{h,cpp} for
some examples. This just allows arbitrary matching and code generation
logic instead of just pattern matching.
Though, I have to agree with Dan on assessing whether the selection logic is
needed. Do you have an example where the PTX back-end cannot generate code
for some piece of LLV...