search for: prix64

Hello. Use <inttypes.h> PRIx64 instead of llx to get rid of gcc warning format ?%llx? expects type ?long long unsigned int?, but argument 2 has type ?uint64_t? -- MartinS diff --git a/com32/gpllib/acpi/xsdt.c b/com32/gpllib/acpi/xsdt.c index 208abc6..228b6c3 100644 --- a/com32/gpllib/acpi/xsdt.c +++ b/com32/gpllib/acpi/xsdt.c...

...13:51:03.000000000 +0100 @@ -1068,9 +1068,21 @@ static int iommu_alloc(struct acpi_drhd_ iommu->cap = dmar_readq(iommu->reg, DMAR_CAP_REG); iommu->ecap = dmar_readq(iommu->reg, DMAR_ECAP_REG); - dprintk(XENLOG_INFO VTDPREFIX, - "drhd->address = %"PRIx64"\n", drhd->address); - dprintk(XENLOG_INFO VTDPREFIX, "iommu->reg = %p\n", iommu->reg); + drhd->iommu = iommu; + + dprintk(XENLOG_DEBUG VTDPREFIX, + "drhd->address = %"PRIx64" iommu->reg = %p\n", + drhd->add...

meminfo.c32: Remove unneeded 'x' characters from output. Commit 5932f124 ("com32: change '%llx' to use PRIx64", committed on 2015-01-06) adds 1 "x" character per each of the 3 hex output columns for the 'INT 15h e820' value(s) in meminfo.c32. These 3 extra "x" characters are not really needed in this context, and they can make the resulting text output less suited for 80 c...

Hey guys, I'm having trouble with PRIx64 and buddies in the X86 target on SLES 11. After searching, my issue seems like a generic problem with PRI support on different OS's. Here's a decent description of my problem: http://gcc.gnu.org/ml/gcc-help/2006-10/msg00221.html Any suggested methods to correct for <inttypes.h> no...

This patch fixes size of ttbcr register (TCR_EL1 in case of AArch64) and it''s programming considering size in case of context switch. Currently ttbcr is defined as 32b register but for AArch64 TCR_EL1 size is 64b. Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> --- xen/arch/arm/domain.c | 8

...nbd.c index 672f35b..6bd8861 100644 --- a/plugins/nbd/nbd.c +++ b/plugins/nbd/nbd.c @@ -267,8 +267,9 @@ nbd_request_raw (struct handle *h, uint16_t flags, uint16_t type, int r; pthread_mutex_lock (&h->write_lock); - nbdkit_debug ("sending request with type %d and cookie %#" PRIx64, type, - cookie); + nbdkit_debug ("sending request type %d (%s), flags %#x, offset %#" PRIx64 + ", count %#x, cookie %#" PRIx64, type, name_of_nbd_cmd(type), + flags, offset, count, cookie); r = write_full (h->fd, &req, siz...

...> --- a/plugins/nbd/nbd.c > +++ b/plugins/nbd/nbd.c > @@ -267,8 +267,9 @@ nbd_request_raw (struct handle *h, uint16_t flags, uint16_t type, > int r; > > pthread_mutex_lock (&h->write_lock); > - nbdkit_debug ("sending request with type %d and cookie %#" PRIx64, type, > - cookie); > + nbdkit_debug ("sending request type %d (%s), flags %#x, offset %#" PRIx64 > + ", count %#x, cookie %#" PRIx64, type, name_of_nbd_cmd(type), > + flags, offset, count, cookie); > r = write_full...

...64e477db 100644 > --- a/hw/vfio/trace-events > +++ b/hw/vfio/trace-events > @@ -90,6 +90,9 @@ vfio_pci_nvidia_gpu_setup_quirk(const char *name, uint64_t tgt, uint64_t size) " > vfio_pci_nvlink2_setup_quirk_ssatgt(const char *name, uint64_t tgt, uint64_t size) "%s tgt=0x%"PRIx64" size=0x%"PRIx64 > vfio_pci_nvlink2_setup_quirk_lnkspd(const char *name, uint32_t link_speed) "%s link_speed=0x%x" > > +vfio_pci_vmd_quirk_shadow_regs(const char *name, uint64_t mb1, uint64_t mb2) "%s membar1_phys=0x%"PRIx64" membar2_phys=0x%"PRIx...

...: ddrescue: realloc: %m", filename); goto out; } - map.ranges[i].start = offset; - map.ranges[i].end = offset + length - 1; - map.ranges[i].size = length; - map.ranges[i].status = status; } - nbdkit_debug ("%s: range: 0x%" PRIx64 " 0x%" PRIx64 " '%c'", filename, offset, length, status); + nbdkit_debug ("%s: range: 0x%" PRIx64 " 0x%" PRIx64 " '%c'", + filename, offset, length, status); } } @@ -133,9 +132,7 @@ parse_mapfile (co...

...void pci_msix_invalid_write(void *opaque, target_phys_addr_t addr, uint32_t val) { - PT_LOG("Error: Invalid write to MSI-X table, \ - only dword access is allowed.\n"); + PT_LOG("Error: Invalid write to MSI-X table, addr %016"PRIx64";" + " only dword access is allowed\n", addr); } static void pci_msix_writel(void *opaque, target_phys_addr_t addr, uint32_t val) @@ -441,13 +441,11 @@ static void pci_msix_writel(void *opaque struct pt_msix_info *msix = dev->msix; struct msix_entry_in...

...ate.c @@ -963,6 +963,24 @@ static void domcreate_launch_dm(libxl__egc *egc, libxl__multidev *multidev, } } + for (i = 0; i < d_config->b_info.num_iomem; i++) { + libxl_iomem_range *io = &d_config->b_info.iomem[i]; + + LOG(DEBUG, "dom%d iomem %"PRIx64"-%"PRIx64, + domid, io->start, io->start + io->number - 1); + + ret = xc_domain_iomem_permission(CTX->xch, domid, + io->start, io->number, 1); + if ( ret<0 ){ + LOGE(ERROR, +...

A few fixes and a possible enhancement to the ddrescue filter. If you think these are all OK, I will squash it into your patch and push it. Rich.

With some crufty sed scripts we can generate functions that map from NBD protocol flags (eg. NBD_CMD_READ) to strings ("NBD_CMD_READ"). This works on GNU sed and with FreeBSD, also with GNU sed's --posix option, so I guess the sed code is POSIX-compatible. Rich.

...vfio/trace-events > > > +++ b/hw/vfio/trace-events > > > @@ -90,6 +90,9 @@ vfio_pci_nvidia_gpu_setup_quirk(const char *name, uint64_t tgt, uint64_t size) " > > > vfio_pci_nvlink2_setup_quirk_ssatgt(const char *name, uint64_t tgt, uint64_t size) "%s tgt=0x%"PRIx64" size=0x%"PRIx64 > > > vfio_pci_nvlink2_setup_quirk_lnkspd(const char *name, uint32_t link_speed) "%s link_speed=0x%x" > > > > > > +vfio_pci_vmd_quirk_shadow_regs(const char *name, uint64_t mb1, uint64_t mb2) "%s membar1_phys=0x%"PRIx64&qu...

...x86/hpet.c --- a/xen/arch/x86/hpet.c Mon Jul 14 15:21:03 2008 +0100 +++ b/xen/arch/x86/hpet.c Wed Jul 16 12:43:52 2008 +0800 @@ -97,8 +97,6 @@ static int reprogram_hpet_evt_channel( delta = expire - now; if ( delta <= 0 ) { - printk(KERN_DEBUG "reprogram: expire(%"PRIx64") < " - "now(%"PRIx64")\n", expire, now); if ( !force ) return -ETIME; } @@ -142,12 +140,10 @@ static void handle_hpet_broadcast(struct { cpumask_t mask; s_time_t now, next_event; - int cpu, current_cpu = smp_pr...

Patches that were posted last week - with review comments addressed.

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

...cts type ''long long unsigned int'', but argument 2 has type ''long unsigned int'' In xen/include/xen/efi.h: 23616: unsigned long mps; /* MPS table */ In xen/arch/x86/mpparse.c (line 669): 23616: printk(KERN_INFO "SMP MP-table at %08"PRIx64"\n", efi.mps); Should mps be uint64_t ? What about the other fields in struct efi ? Ian. _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...int32_t count, uint64_t offs, uint32_t flags, + struct nbdkit_extents *extents, int *err) +{ + struct handle *h = handle; + uint64_t id = get_id (h); + int r; + + assert (!(flags & ~(NBDKIT_FLAG_REQ_ONE))); + output (h, "Extents", id, + "offset=0x%" PRIx64 " count=0x%x req_one=%d ...", + offs, count, !!(flags & NBDKIT_FLAG_REQ_ONE)); + r = next_ops->extents (nxdata, count, offs, flags, extents, err); + if (r == -1) + output_return (h, "...Extents", id, r, err); + else { + FILE *fp; + char *extents_str =...

...c int __get_instruction_length(void); +int vmx_vmcs_save(struct vcpu *v, struct vmcs_data *c) +{ + unsigned long inst_len; + + inst_len = __get_instruction_length(); + c->eip = __vmread(GUEST_RIP); + +#ifdef HVM_DEBUG_SUSPEND + printk("vmx_vmcs_save: inst_len=0x%lx, eip=0x%"PRIx64".\n", + inst_len, c->eip); +#endif + + c->esp = __vmread(GUEST_RSP); + c->eflags = __vmread(GUEST_RFLAGS); + + c->cr0 = v->arch.hvm_vmx.cpu_shadow_cr0; + c->cr3 = v->arch.hvm_vmx.cpu_cr3; + c->cr4 = v->arch.hvm_vmx.cpu_shadow_cr4; + +#...