search for: prix32

This patch fixes size of ttbcr register (TCR_EL1 in case of AArch64) and it''s programming considering size in case of context switch. Currently ttbcr is defined as 32b register but for AArch64 TCR_EL1 size is 64b. Signed-off-by: Anup Patel <anup.patel@linaro.org> Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> --- xen/arch/arm/domain.c | 8

...if (f->filter.can_fua) return f->filter.can_fua (&next_ops, &nxdata, handle); @@ -515,8 +515,8 @@ filter_pread (struct backend *b, struct connection *conn, assert (flags == 0); - debug ("pread count=%" PRIu32 " offset=%" PRIu64 " flags=0x%" PRIx32, - count, offset, flags); + debug ("%s: pread count=%" PRIu32 " offset=%" PRIu64 " flags=0x%" PRIx32, + f->name, count, offset, flags); if (f->filter.pread) return f->filter.pread (&next_ops, &nxdata, handle, @@ -537,8 +537,8...

...gt; > - if (!sysctl || sysctl->interface_version != > XEN_SYSCTL_INTERFACE_VERSION) - /* BUG ? */ > + if (!sysctl) > + return; > + > + if (sysctl->interface_version != XEN_SYSCTL_INTERFACE_VERSION) { > + VG_(dmsg)("WARNING: sysctl version %"PRIx32" not supported, " > + "built for %"PRIx32"\n", > + sysctl->interface_version, > + XEN_SYSCTL_INTERFACE_VERSION); > + if (VG_(clo_verbosity) > 1) { > + VG_(get_and_pp_StackTrace)(tid, VG_(clo...

This round implements all of the review comments from V2 and all patches are now acked. Unless there are any objections I intend to apply later this morning. Ian.

...e_launch_dm(libxl__e LOG(ERROR, "unable to add disk devices"); goto error_out; } + + for (i = 0; i < d_config->b_info.num_ioports; i++) { + libxl_ioport_range *io = &d_config->b_info.ioports[i]; + + LOG(DEBUG, "dom%d ioports %"PRIx32"-%"PRIx32, + domid, io->first, io->first + io->number - 1); + + ret = xc_domain_ioport_permission(CTX->xch, domid, + io->first, io->number, 1); + if ( ret<0 ){ + LOGE(ERROR, +...

First off, Apologies for the massive patch series... This series boots a 32-bit dom0 kernel to a command prompt on an ARMv8 (AArch64) model. The kernel is the same one as I am currently using with the 32 bit hypervisor I haven''t yet tried starting a guest or anything super advanced like that ;-). Also there is not real support for 64-bit domains at all, although in one or two places I

...(f->filter.can_cache) return f->filter.can_cache (&next_ops, &nxdata, handle); @@ -652,7 +626,7 @@ filter_pread (struct backend *b, struct connection *conn, assert (flags == 0); debug ("%s: pread count=%" PRIu32 " offset=%" PRIu64 " flags=0x%" PRIx32, - f->name, count, offset, flags); + b->name, count, offset, flags); if (f->filter.pread) return f->filter.pread (&next_ops, &nxdata, handle, @@ -673,7 +647,7 @@ filter_pwrite (struct backend *b, struct connection *conn, assert (!(flags & ~NBDKIT_...

...00644 --- a/generator/states-newstyle-opt-go.c +++ b/generator/states-newstyle-opt-go.c @@ -147,9 +147,35 @@ SET_NEXT_STATE (%^OPT_EXPORT_NAME.START); return 0; default: - if (handle_reply_error (h) == 0) - set_error (0, "handshake: unknown reply from NBD_OPT_GO: 0x%" PRIx32, - reply); + if (handle_reply_error (h) == 0) { + /* Decode expected known errors into a nicer string */ + switch (reply) { + case NBD_REP_ERR_POLICY: + case NBD_REP_ERR_PLATFORM: + set_error (0, "handshake: server policy prevents NBD_OPT_GO")...

...t_ops = { @@ -448,11 +445,12 @@ filter_pread (struct backend *b, struct connection *conn, assert (flags == 0); - debug ("pread count=%" PRIu32 " offset=%" PRIu64, count, offset); + debug ("pread count=%" PRIu32 " offset=%" PRIu64 " flags=0x%" PRIx32, + count, offset, flags); if (f->filter.pread) return f->filter.pread (&next_ops, &nxdata, handle, - buf, count, offset); + buf, count, offset, flags); else return f->backend.next->pread (f->backen...

...00644 --- a/generator/states-newstyle-opt-go.c +++ b/generator/states-newstyle-opt-go.c @@ -147,9 +147,10 @@ SET_NEXT_STATE (%^OPT_EXPORT_NAME.START); return 0; default: + if (handle_reply_error (h) == 0) + set_error (0, "handshake: unknown reply from NBD_OPT_GO: 0x%" PRIx32, + reply); SET_NEXT_STATE (%.DEAD); - set_error (0, "handshake: unknown reply from NBD_OPT_GO: 0x%" PRIx32, - reply); return -1; } diff --git a/generator/states-newstyle-opt-set-meta-context.c b/generator/states-newstyle-opt-set-meta-context....

Hello everyone, this is the fourth version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

Hello everyone, this is the very first version of the patch series that introduces ARMv7 with virtualization extensions support in Xen. The series allows Xen and Dom0 to boot on a Cortex-A15 based Versatile Express simulator. See the following announce email for more informations about what we are trying to achieve, as well as the original git history: See

...1 <= map.ranges.ptr[i].end) { /* entirely contained within this range */ return next_ops->pread (nxdata, buf, count, offset, flags, err); } } } /* read was not fully covered */ - nbdkit_debug ("ddrescue: pread: range: 0x%" PRIx64 " 0x%" PRIx32 " failing with EIO", offset, count); + nbdkit_debug ("ddrescue: pread: range: 0x%" PRIx64 " 0x%" PRIx32 + " failing with EIO", offset, count); *err = EIO; return -1; } diff --git a/tests/test-ddrescue-filter.sh b/tests/test-ddrescue-fil...

...irectly. + */ + vec_ctrl = msix->phys_iomem_base + 16 * entry_nr + 12; + + if ( msix->enabled && !(*vec_ctrl & 0x1) ) + { + PT_LOG("Can''t update entry %d since MSI-X is already enabled" + " (%08"PRIx32" -> %08"PRIx32")\n", + entry_nr, entry->io_mem[offset], val); + return; + } - if ( offset != 3 && entry->io_mem[offset] != val ) entry->flags = 1; + } + entry->io_mem[offset] = val; if ( offs...

I have dropped the map filter from this series for now while I try to get it working. However I think the truncate filter is in a good shape. This incorporates all feedback from Eric's review. Also there are three small fixes to the filter code, all revealed when I was testing using multiple filters which we'd not done much of before. Rich.

A few fixes and a possible enhancement to the ddrescue filter. If you think these are all OK, I will squash it into your patch and push it. Rich.

...NULL; @@ -448,7 +506,7 @@ static void do_debug_trap(struct cpu_user_regs *regs, unsigned int code) switch ( code ) { case 0xe0 ... 0xef: reg = code - 0xe0; - r = &regs->r0 + reg; + r = select_user_reg(regs, reg); printk("DOM%d: R%d = %#010"PRIx32" at %#010"PRIx32"\n", domid, reg, *r, regs->pc); break; @@ -518,7 +576,7 @@ static void do_cp15_32(struct cpu_user_regs *regs, union hsr hsr) { struct hsr_cp32 cp32 = hsr.cp32; - uint32_t *r = &regs->r0 + cp32.r...

...> +} >> + >> +int arch_hvm_load(struct domain *d, struct hvm_save_header *hdr) >> +{ >> + uint32_t cpuid; >> + >> + if ( hdr->magic != HVM_FILE_MAGIC ) >> + { >> + printk(XENLOG_G_ERR "HVM%d restore: bad magic number %#"PRIx32"\n", >> + d->domain_id, hdr->magic); >> + return -1; >> + } >> + >> + if ( hdr->version != HVM_FILE_VERSION ) >> + { >> + printk(XENLOG_G_ERR "HVM%d restore: unsupported version %u\n", >&g...

...ta3, guid_bytes + 6, sizeof (data3)); + memcpy (&data4, guid_bytes + 8, sizeof (data4)); + + /* ensure proper endianness */ + data1 = le32toh (data1); + data2 = le16toh (data2); + data3 = le16toh (data3); + data4 = be64toh (data4); + + return safe_asprintf (g, + "%08" PRIX32 "-%04" PRIX16 "-%04" PRIX16 "-%04" PRIX64 "-%06" PRIX64, + data1, data2, data3, (data4 >> 48), (data4 << 16)); +} + /* NB: This function DOES NOT test for the existence of the file. It * will return non-NULL even if the file/director...

...t); break; + case HSR_EC_WFI_WFE: + if ( list_empty(&current->arch.vgic.inflight_irqs) ) + do_sched_op_compat(SCHEDOP_block, 0); + regs->pc += hsr.len ? 4 : 2; + break; default: printk("Hypervisor Trap. HSR=0x%x EC=0x%x IL=%x Syndrome=%"PRIx32"\n", hsr.bits, hsr.ec, hsr.len, hsr.iss); diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 39b9775..8495384 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -608,12 +608,14 @@ void vgic_vcpu_inject_irq(struct vcpu *v, unsigned int irq, int virtual)...