Displaying 5 results from an estimated 5 matches for "predicateoperand".
2015 Dec 14
2
Tablegen definition question
Hi,
That's what the DecoderMethod is for. Similarly ParserMatchClass for the
asm parser and PrintMethod for the asm printer:
def CondCodeOperand : AsmOperandClass { let Name = "CondCode"; }
def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm),
(ops (i32 14), (i32 zero_reg))> {
let PrintMethod = "printPredicateOperand";
let ParserMatchClass = CondCodeOperand;
let DecoderMethod = "DecodePredicateOperand";
}
James
On Mon, 14 Dec 2015 at 13:...
2015 Dec 14
2
Tablegen definition question
Hi All,
In ARMInstFormats.td predicate is defined this way:
*def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm),*
*(ops (i32 14), (i32 zero_reg))> {...}*
I use the same definition in my code. But I have another version of
predicate which is exactly the same but it is a condition code plus a
quantifier! (e.g. Xpred = (pred + i32imm)).
I was wondering how we can define a...
2015 Dec 14
2
Tablegen definition question
...ames,
that was also what I've planned to do but just wasn't sure. Thanks for
that.
On Mon, Dec 14, 2015 at 11:52 AM, James Molloy <james at jamesmolloy.co.uk>
wrote:
> Hi,
>
> You can't nest operands like that - it must be a flattened list. So:
>
> def *Xpred* : PredicateOperand<OtherVT, (ops *i32imm, i32imm*, i32imm),
> (ops (i32 14), (i32 zero_reg))> {...}
>
> On Mon, 14 Dec 2015 at 10:21 Sky Flyer via llvm-dev <
> llvm-dev at lists.llvm.org> wrote:
>
>> Hi All,
>>
>> In ARMInstFormats.td predicate is defined this way:
>>...
2015 Sep 22
2
zero_reg
Hi all,
what is exactly "zero_reg"?
from ARMInstFromats.td:
*def pred : PredicateOperand<OtherVT, (ops i32imm, i32imm), (ops (i32 14),
(i32 zero_reg))> {...}*
I thought zero_reg can be replace by a random name like (alu_stat_reg for
alu state register) but when I compiled it, I figure out that zero_reg is a
predefined variable.
Can someone please give me more information about...
2018 Mar 23
1
ARM Backend BuildMI operand issues
Thank you for your help Tom
you are totally right with the registers but the command you suggest
also doesn't work.
After some research I found the following thread on the mailing list:
http://lists.llvm.org/pipermail/llvm-dev/2017-February/110086.html
With your help and the information about the condition codes I was able
to resolve the error:
BuildMI(BB, BB.end(), DL,