Displaying 17 results from an estimated 17 matches for "ppict".
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pict
2010 Apr 20
1
[PATCH] nv30/exa : cleanup from nv40 exa
...LEND_FUNC_ENABLE, 3);
OUT_RING (chan, 1);
- OUT_RING (chan, (sblend << 16) | sblend);
- OUT_RING (chan, (dblend << 16) | dblend);
+ OUT_RING (chan, sblend);
+ OUT_RING (chan, dblend);
}
}
@@ -305,43 +255,47 @@ NV30EXATexture(ScrnInfoPtr pScrn, PixmapPtr pPix, PicturePtr pPict, int unit)
struct nouveau_channel *chan = pNv->chan;
struct nouveau_grobj *rankine = pNv->Nv3D;
struct nouveau_bo *bo = nouveau_pixmap_bo(pPix);
- nv_pict_texture_format_t *fmt;
- uint32_t card_filter, card_repeat;
uint32_t tex_reloc = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD...
2010 May 31
1
[PATCH] nv50/exa: use dual-source blending for component-alpha composite
...define PFP_C_A8 0x0500 /* (src IN mask) a8 rt - same for CA and CA_SA */
#define PFP_NV12 0x0600 /* NV12 YUV->RGB */
diff --git a/src/nv50_exa.c b/src/nv50_exa.c
index e86f903..8bacdf0 100644
--- a/src/nv50_exa.c
+++ b/src/nv50_exa.c
@@ -751,7 +751,7 @@ NV50EXABlend(PixmapPtr ppix, PicturePtr ppict, int op, int component_alpha)
NV50EXA_LOCALS(ppix);
struct nv50_blend_op *b = &NV50EXABlendOp[op];
unsigned sblend = b->src_blend;
- unsigned dblend = b->dst_blend;
+ unsigned dblend = b->dst_blend, dblend_a = b->dst_blend;
if (b->dst_alpha) {
if (!PICT_FORMAT_A(ppic...
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...ush, 0x000000000);
> + PUSH_DATA(push, 0x000000000);
> + }
> + }
> +}
> +
> #endif
> diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
> index a53dfe6..017a7da 100644
> --- a/src/nvc0_exa.c
> +++ b/src/nvc0_exa.c
> @@ -532,20 +532,13 @@ NVC0EXACheckTexture(PicturePtr ppict, PicturePtr pdpict, int op)
> static Bool
> NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict, unsigned unit)
> {
> - uint64_t offset = pNv->scratch->offset + SOLID(unit);
> struct nouveau_pushbuf *push = pNv->pushbuf;
>
> PUSH_DATAu(push, pNv->scratch, SOLID(unit...
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...000000000);
> + PUSH_DATA(push, 0x000000000);
> + }
> + }
> +}
> +
> #endif
> diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
> index a53dfe6..c8ace97 100644
> --- a/src/nvc0_exa.c
> +++ b/src/nvc0_exa.c
> @@ -538,14 +538,8 @@ NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict, unsigned unit)
> PUSH_DATAu(push, pNv->scratch, SOLID(unit), 1);
> PUSH_DATA (push, ppict->pSourcePict->solidFill.color);
> PUSH_DATAu(push, pNv->scratch, TIC_OFFSET + (unit * 32), 8);
> - PUSH_DATA (push, _(B_C0, G_C1, R_C2, A_C3, 8_8_8_8));
> - PUSH_DATA (push,...
2010 Feb 09
1
texture dimension limits in ddx
in nv10_exa.c :
check_texture does :
if (w > 2046 || h > 2046)
NOUVEAU_FALLBACK("picture too large, %dx%d\n", w, h);
check_render_target does :
if (w > 4096 || h > 4096)
return FALSE;
So we have different size limits for the source and the destination ?
Another thing is that nv20 uses nv10_exa.c code, and the limit in
2009 Dec 11
2
[PATCH 1/2] exa: Pre-G80 tiling support.
...VRAM;
bo_flags |= is_src ? NOUVEAU_BO_RD : NOUVEAU_BO_WR;
- if (!nouveau_exa_pixmap_is_tiled(ppix)) {
+ if (!nv50_style_tiled_pixmap(ppix)) {
BEGIN_RING(chan, eng2d, mthd, 2);
OUT_RING (chan, fmt);
OUT_RING (chan, 1);
@@ -465,7 +465,7 @@ NV50EXARenderTarget(PixmapPtr ppix, PicturePtr ppict)
unsigned format;
/*XXX: Scanout buffer not tiled, someone needs to figure it out */
- if (!nouveau_exa_pixmap_is_tiled(ppix))
+ if (!nv50_style_tiled_pixmap(ppix))
NOUVEAU_FALLBACK("pixmap is scanout buffer\n");
switch (ppict->format) {
@@ -553,7 +553,7 @@ NV50EXATexture(...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...C2_5_NORMALIZED_COORDS | (height - 1));
+ PUSH_DATA(push, 0x000000000);
+ PUSH_DATA(push, 0x000000000);
+ }
+ }
+}
+
#endif
diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
index a53dfe6..017a7da 100644
--- a/src/nvc0_exa.c
+++ b/src/nvc0_exa.c
@@ -532,20 +532,13 @@ NVC0EXACheckTexture(PicturePtr ppict, PicturePtr pdpict, int op)
static Bool
NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict, unsigned unit)
{
- uint64_t offset = pNv->scratch->offset + SOLID(unit);
struct nouveau_pushbuf *push = pNv->pushbuf;
PUSH_DATAu(push, pNv->scratch, SOLID(unit), 1);
PUSH_DATA (push, ppict-&...
2016 Oct 16
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...RMALIZED_COORDS | (height - 1));
+ PUSH_DATA(push, 0x000000000);
+ PUSH_DATA(push, 0x000000000);
+ }
+ }
+}
+
#endif
diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
index a53dfe6..c8ace97 100644
--- a/src/nvc0_exa.c
+++ b/src/nvc0_exa.c
@@ -538,14 +538,8 @@ NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict, unsigned unit)
PUSH_DATAu(push, pNv->scratch, SOLID(unit), 1);
PUSH_DATA (push, ppict->pSourcePict->solidFill.color);
PUSH_DATAu(push, pNv->scratch, TIC_OFFSET + (unit * 32), 8);
- PUSH_DATA (push, _(B_C0, G_C1, R_C2, A_C3, 8_8_8_8));
- PUSH_DATA (push, offset);
- PUSH_DATA (pus...
2016 Oct 17
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...+ }
>> + }
>> +}
>> +
>> #endif
>> diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
>> index a53dfe6..c8ace97 100644
>> --- a/src/nvc0_exa.c
>> +++ b/src/nvc0_exa.c
>> @@ -538,14 +538,8 @@ NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict,
>> unsigned unit)
>> PUSH_DATAu(push, pNv->scratch, SOLID(unit), 1);
>> PUSH_DATA (push, ppict->pSourcePict->solidFill.color);
>> PUSH_DATAu(push, pNv->scratch, TIC_OFFSET + (unit * 32), 8);
>> - PUSH_DATA (push, _(B_C0, G_C1,...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...gt;> + }
>> + }
>> +}
>> +
>> #endif
>> diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
>> index a53dfe6..017a7da 100644
>> --- a/src/nvc0_exa.c
>> +++ b/src/nvc0_exa.c
>> @@ -532,20 +532,13 @@ NVC0EXACheckTexture(PicturePtr ppict, PicturePtr
>> pdpict, int op)
>> static Bool
>> NVC0EXAPictSolid(NVPtr pNv, PicturePtr ppict, unsigned unit)
>> {
>> - uint64_t offset = pNv->scratch->offset + SOLID(unit);
>> struct nouveau_pushbuf *push = pNv->pushbuf;
>>
>&g...
2015 Mar 14
1
[PATCH ddx] Add support for VRAM-less devices to the ddx
...ORMAT;
uint32_t bo_flags;
- bo_flags = nvpix->shared ? NOUVEAU_BO_GART : NOUVEAU_BO_VRAM;
+ bo_flags = NOUVEAU_BO_APER;
bo_flags |= is_src ? NOUVEAU_BO_RD : NOUVEAU_BO_WR;
if (!nv50_style_tiled_pixmap(ppix)) {
@@ -579,7 +578,7 @@ NVC0EXAPictTexture(NVPtr pNv, PixmapPtr ppix, PicturePtr ppict, unsigned unit)
if (!nv50_style_tiled_pixmap(ppix))
NOUVEAU_FALLBACK("pixmap is scanout buffer\n");
- PUSH_REFN (push, bo, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+ PUSH_REFN (push, bo, NOUVEAU_BO_APER | NOUVEAU_BO_RD);
PUSH_DATAu(push, pNv->scratch, TIC_OFFSET + (unit * 32), 8);...
2010 Jan 03
0
[PATCH] exa: Some compat defines for new pixman formats.
...ICT_FORMAT(32, PICT_TYPE_ARGB, 0, 10, 10, 10)
+#endif
+#ifndef PICT_b8g8r8a8
+#define PICT_b8g8r8a8 PIXMAN_FORMAT(32,PIXMAN_TYPE_BGRA,8,8,8,8)
+#endif
+#ifndef PICT_b8g8r8x8
+#define PICT_b8g8r8x8 PIXMAN_FORMAT(32,PIXMAN_TYPE_BGRA,0,8,8,8)
+#endif
+
static Bool
NV50EXACheckRenderTarget(PicturePtr ppict)
{
--=20
1.6.6.rc4
On Sun, Jan 3, 2010 at 2:55 AM, Johannes Obermayr
<johannesobermayr at gmx.de> wrote:
> I forgot to add the mailing list:
>
> It changed:
>
> CC nv50_sor.lo
> nv50_exa.c: In function 'NV50EXACheckTexture':
> nv50_exa.c:545: error: 'PICT_...
2015 May 04
0
[ANNOUNCE] xf86-video-mach64 6.9.5
...:
Remove unused atidecoder.c & atidecoder.h
Remove unused atiaudio.c & ATIAudioNames declaration
Connor Behan (1):
Drop dependence on xf86PciInfo.h
Dave Airlie (1):
mach64: fix build probably not required with pci access anyways
Matthieu Herrb (1):
Deal with pPict->pDrawable == NULL for source-only pictures.
git tag: xf86-video-mach64-6.9.5
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-mach64-6.9.5.tar.bz2
MD5: 1013ccc86052d0e82c4d504e0c4e896e xf86-video-mach64-6.9.5.tar.bz2
SHA1: 0ba2d51752a62808286937cf3c6a95794fa5cb29 xf86-video...
2010 Jan 03
0
[PATCH] exa: Some compat defines for depth 30 formats.
...BGR, 2, 10, 10, 10)
+#define PICT_x2b10g10r10 PICT_FORMAT(32, PICT_TYPE_ABGR, 0, 10, 10, 10)
+#define PICT_a2r10g10b10 PICT_FORMAT(32, PICT_TYPE_ARGB, 2, 10, 10, 10)
+#define PICT_x2r10g10b10 PICT_FORMAT(32, PICT_TYPE_ARGB, 0, 10, 10, 10)
+#endif
+
static Bool
NV50EXACheckRenderTarget(PicturePtr ppict)
{
--
1.6.6.rc4
On Sun, Jan 3, 2010 at 1:33 AM, Johannes Obermayr
<johannesobermayr at gmx.de> wrote:
> Hi,
>
> latest 2D driver does not compile.
>
> libdrm and Mesa are latest git...
>
> Johannes
>
>
> CC nv50_exa.lo
> nv50_exa.c: In function 'NV50E...
2010 Jan 03
3
Latest xf86-video-nouveau does not compile
Hi,
latest 2D driver does not compile.
libdrm and Mesa are latest git...
Johannes
CC nv50_exa.lo
nv50_exa.c: In function 'NV50EXACheckRenderTarget':
nv50_exa.c:451: error: 'PICT_a2b10g10r10' undeclared (first use in this function)
nv50_exa.c:451: error: (Each undeclared identifier is reported only once
nv50_exa.c:451: error: for each function it appears in.)
nv50_exa.c:452:
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
These are copied directly from the mesa repository.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++
src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++----------------
2 files changed, 892 insertions(+), 340 deletions(-)
create mode 100644 src/hwdefs/gm107_texture.xml.h
diff --git