Displaying 6 results from an estimated 6 matches for "pix2".
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2015 Jan 28
2
[LLVMdev] RFC: generation of PSAD instruction
Hello,
I was looking at the following test case which is very relevant in imaging applications.
int sad(unsigned char *pix1, unsigned char *pix2)
{
int sum = 0;
for( int x = 0; x < 16; x++ )
{
sum += abs( pix1[x] - pix2[x] );
}
return sum;
}
The llvm IR generated after all the IR optimizations is
.....
%9 = bitcast i8* %8 t...
2014 Nov 11
3
[LLVMdev] supporting SAD in loop vectorizer
...2:15:12 PM
> Subject: RE: [LLVMdev] supporting SAD in loop vectorizer
>
> Here's the simple SAD code:
> ---------------------------------------------------
> 1 #include <stdlib.h>
> 2
> 3 extern int ly,lx;
> 4 int sad_c( unsigned char *pix1, unsigned char *pix2)
> 5 {
> 6 int i_sum = 0;
> 7 for( int x = 0; x < lx; x++ )
> 8 i_sum += abs( pix1[x] - pix2[x] );
> 9 return i_sum;
> 10 }
> 11
> -----------------------------------------------------
>
> The loop vec...
2014 Nov 11
4
[LLVMdev] supporting SAD in loop vectorizer
...: [LLVMdev] supporting SAD in loop vectorizer
> >
> > Here's the simple SAD code:
> > ---------------------------------------------------
> > 1 #include <stdlib.h>
> > 2
> > 3 extern int ly,lx;
> > 4 int sad_c( unsigned char *pix1, unsigned char *pix2)
> > 5 {
> > 6 int i_sum = 0;
> > 7 for( int x = 0; x < lx; x++ )
> > 8 i_sum += abs( pix1[x] - pix2[x] );
> > 9 return i_sum;
> > 10 }
> > 11
> > -----------------------------------------------------
> >
> > The loop vectorizer does v...
2015 Jan 28
5
[LLVMdev] RFC: generation of PSAD instruction
...15 10:14:44 PM
>> Subject: [LLVMdev] RFC: generation of PSAD instruction
>>
>> Hello,
>>
>> I was looking at the following test case which is very relevant in
>> imaging applications.
>>
>>
>>
>> int sad(unsigned char *pix1, unsigned char *pix2)
>>
>> {
>>
>> int sum = 0;
>>
>> for( int x = 0; x < 16; x++ )
>>
>> {
>>
>> sum += abs( pix1[x] - pix2[x] );
>>
>> }
>>
>> return sum;
>>
>> }
>>
>>
>>
>> The llvm IR generat...
2014 Nov 04
3
[LLVMdev] supporting SAD in loop vectorizer
----- Original Message -----
> From: "Renato Golin" <renato.golin at linaro.org>
> To: "Dibyendu Das" <Dibyendu.Das at amd.com>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Tuesday, November 4, 2014 5:23:30 AM
> Subject: Re: [LLVMdev] supporting SAD in loop vectorizer
>
> On 4 November 2014 11:06, Das, Dibyendu <Dibyendu.Das at amd.com> wrote:
2005 Oct 22
1
Advice....
...| ^
192.168.x.x/24 192.168.25.x/24
distribution upstream if: 192.168.24.1/24
ubuntu eth0: 192.168.24.2/24
ubuntu eth1: 192.168.25.1
ipcop downsteam ip: 192.168.25.25
pix1 downstream if: 192.168.25.20
pix2 downstream if: 192.168.25.21
The Ubuntu machine also has an interface in the cogent DMZ using a public
ip address (xxx.xxx.xxx.75).
Here''e the result of ip addr ls:
1: lo: <LOOPBACK,UP> mtu 16436 qdisc noqueue
link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:00...