search for: pipt

...if you > remap the same page to the same colour you get cached stale data, but > in practice the data is expired from the cache long before that > happens, so the problem is almost never seen if the flush is forgotten. > Our problem is on the P9xxx processor: they have a L1/L2 VIPT L3 PIPT > cache. As the L1/L2 caches expire clean data, they place the expiring > contents into L3, but because L3 is PIPT, the stale alias suddenly > becomes the default for any read of they physical page because any > update which dirtied the cache line often gets written to main memory >...

...NFO_TYPE not supported. [ 0.000000] psci: SMC Calling Convention v1.1 [ 0.000000] percpu: Embedded 23 pages/cpu s53272 r8192 d32744 u94208 [ 0.000000] pcpu-alloc: s53272 r8192 d32744 u94208 alloc=23*4096 [ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [0] 4 [0] 5 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] CPU features: detected: EL2 vector hardening [ 0.000000] Speculative Store Bypass Disable mitigation not required [ 0.000000] CPU features: detected: ARM erratum 1319367 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2022968 [ 0.000000]...

I''ve encountered a rather unusual bug while I''m implementing live migration on arndale board. After resume, domU kernel starts invoking hypercalls and at some point the hypercall parameters delivered to xen are corrupted. After some debugging (with the help of HW debugger), I found that cache polution happens, and here is the detailed sequence. 1) DomU kernel allocates a local

...ci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 24 pages/cpu @ (ptrval) s60712 r8192 d29400 u98304 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2024064 [ 0.000000] Kernel command line: console=ttyS0,115200n8 root=UUID=7388bb07-be26-4f1d-a11c-48675d650192 rw rootfstype=ext4 rootwait [ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 838...

Hi to all. I'm experimenting with running a https://www.zotac.com/us/product/graphics_card/geforce%C2%AE-gt-710-1gb-pcie-x-1 card on an Nvidia Jetson TX2 arm64 device. Possible? Linux kernel aarch64 5.6.10. Because Nvidia did not list drivers for this architecture, I'm experimenting with a nouveau driver. The Jetson TX2 has a default driver for the host1x framebuffer for output from the

Thanks to Thierry for finding this - applying index e14643615698..00eeaaffeae5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c @@ -2369,7 +2369,7 @@ nv13b_chipset = { .imem = gk20a_instmem_new, .ltc = gp100_ltc_new, .mc = gp10b_mc_new, - .mmu = gf100_mmu_new, + .mmu = gp10b_mmu_new,

...ci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 24 pages/cpu @ (ptrval) s60712 r8192 d29400 u98304 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2024064 [ 0.000000] Kernel command line: console=ttyS0,115200n8 root=UUID=7388bb07-be26-4f1d-a11c-48675d650192 rw rootfstype=ext4 rootwait [ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 838...

...ci: PSCIv1.0 detected in firmware. [ 0.000000] psci: Using standard PSCI v0.2 function IDs [ 0.000000] psci: MIGRATE_INFO_TYPE not supported. [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 24 pages/cpu @ (ptrval) s60712 r8192 d29400 u98304 [ 0.000000] Detected PIPT I-cache on CPU0 [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 2024064 [ 0.000000] Kernel command line: console=ttyS0,115200n8 root=UUID=7388bb07-be26-4f1d-a11c-48675d650192 rw rootfstype=ext4 rootwait [ 0.000000] Dentry cache hash table entries: 1048576 (order: 11, 838...

...el is built with KVM module enabled? > With more current QEMU -cpu [ -machine ] still is valid ? > > Thanks, > > Thomas > > > root@cubietruck:~# dmesg | grep CPU > [ 0.000000] CPU: ARMv7 Processor [410fc074] revision 4 (ARMv7), > cr=30c5387d > [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing > instruction cache > [ 0.000000] PERCPU: Embedded 12 pages/cpu @ee5c0000 s19916 r8192 d21044 > u49152 > [ 0.000000] RCU restricting CPUs from NR_CPUS=4 to nr_cpu_ids=2. > [ 0.004932] CPU: Testing write buffer coherency: ok >...

On Tue, Mar 12, 2019 at 10:59:09AM +0800, Jason Wang wrote: > > On 2019/3/12 ??2:14, David Miller wrote: > > From: "Michael S. Tsirkin" <mst at redhat.com> > > Date: Mon, 11 Mar 2019 09:59:28 -0400 > > > > > On Mon, Mar 11, 2019 at 03:13:17PM +0800, Jason Wang wrote: > > > > On 2019/3/8 ??10:12, Christoph Hellwig wrote: > > >

On Tue, Mar 12, 2019 at 10:59:09AM +0800, Jason Wang wrote: > > On 2019/3/12 ??2:14, David Miller wrote: > > From: "Michael S. Tsirkin" <mst at redhat.com> > > Date: Mon, 11 Mar 2019 09:59:28 -0400 > > > > > On Mon, Mar 11, 2019 at 03:13:17PM +0800, Jason Wang wrote: > > > > On 2019/3/8 ??10:12, Christoph Hellwig wrote: > > >

...nclude/asm/processor.h @@ -309,7 +309,6 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30]) #define cpu_relax() barrier() -#define cpu_relax_yield() cpu_relax() /* * parisc_requires_coherency() is used to identify the combined VIPT/PIPT diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 5684e68..dac83fc 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -404,8 +404,6 @@ static inline unsigned long __pack_fe01(unsigned int fpmode) #define cpu_...

...nclude/asm/processor.h @@ -309,7 +309,6 @@ extern unsigned long get_wchan(struct task_struct *p); #define KSTK_ESP(tsk) ((tsk)->thread.regs.gr[30]) #define cpu_relax() barrier() -#define cpu_relax_yield() cpu_relax() /* * parisc_requires_coherency() is used to identify the combined VIPT/PIPT diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 5684e68..dac83fc 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -404,8 +404,6 @@ static inline unsigned long __pack_fe01(unsigned int fpmode) #define cpu_...

...h/parisc/include/asm/processor.h @@ -310,7 +310,6 @@ extern unsigned long get_wchan(struct task_struct *p); #define cpu_relax() barrier() #define cpu_relax_yield() cpu_relax() -#define cpu_relax_lowlatency() cpu_relax() /* * parisc_requires_coherency() is used to identify the combined VIPT/PIPT diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h index 908fa7c..5684e68 100644 --- a/arch/powerpc/include/asm/processor.h +++ b/arch/powerpc/include/asm/processor.h @@ -405,7 +405,6 @@ static inline unsigned long __pack_fe01(unsigned int fpmode) #endif #d...

...ting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.15.0-rc8-next2g-gfd920f6-dirty (lpnm at ENIAC10) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #2 SMP Thu Jan 25 12:44:50 WET 2018 [ 0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35212 r8192 d22132 u65536 [ 0.000000] Built 1 zonelists, mobility grouping on. Total p...

...ting Linux on physical CPU 0x0 [ 0.000000] Linux version 4.15.0-rc4-next2g-g400b6af-dirty (lpnm at ENIAC10) (gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)) #2 SMP Sun Jan 21 11:08:49 WET 2018 [ 0.000000] CPU: ARMv7 Processor [414fc091] revision 1 (ARMv7), cr=10c5387d [ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache [ 0.000000] Memory policy: Data cache writealloc [ 0.000000] random: fast init done [ 0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s35148 r8192 d22196 u65536 [ 0.000000] Built 1 zonelists, mobility grouping on. Total p...

This series of patches makes Xen pass a (somewhat) valid device tree to dom0. The device tree for dom0 is the same as the one supplied to Xen except the memory and chosen nodes are adjusted appropriately. We don''t yet make use of the device tree to map MMIO regions or setup interrupts for the guest and we still include the UART used for Xen''s console. Note that loading Linux

Peter, here is v2 with some improved patch descriptions and some fixes. The previous version has survived one day of linux-next and I only changed small parts. So unless there is some other issue, feel free to pull (or to apply the patches) to tip/locking. The following changes since commit 07d9a380680d1c0eb51ef87ff2eab5c994949e69: Linux 4.9-rc2 (2016-10-23 17:10:14 -0700) are available in

Peter, here is v2 with some improved patch descriptions and some fixes. The previous version has survived one day of linux-next and I only changed small parts. So unless there is some other issue, feel free to pull (or to apply the patches) to tip/locking. The following changes since commit 07d9a380680d1c0eb51ef87ff2eab5c994949e69: Linux 4.9-rc2 (2016-10-23 17:10:14 -0700) are available in

Hi Ben, Thanks for your reply. My replies follow in between. Luís On Thu, Jan 25, 2018 at 5:40 AM, Ben Skeggs <skeggsb at gmail.com> wrote: > On 24 January 2018 at 06:19, Luís Mendes <luis.p.mendes at gmail.com> wrote: >> Hi Arnd, >> >> Sorry for sending this email directly to you, but maybe you can help >> me, or guide me where to look for. >>