search for: pior

Displaying 20 results from an estimated 40 matches for "pior".

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2013 Jul 30
0
[PATCH] drm/nv50-/disp: use the number of dac, sor, pior rather than hardcoded values
...u/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 7ffe2f3..c168ae3 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c @@ -628,7 +628,7 @@ nv50_disp_base_init(struct nouveau_object *object) } /* ... PIOR caps */ - for (i = 0; i < 3; i++) { + for (i = 0; i < priv->pior.nr; i++) { tmp = nv_rd32(priv, 0x61e000 + (i * 0x800)); nv_wr32(priv, 0x6101f0 + (i * 0x04), tmp); } @@ -834,10 +834,11 @@ exec_script(struct nv50_disp_priv *priv, int head, int id) u8 ver, hdr, cnt, len; u16 dat...
2023 Aug 14
1
2b5d1c29f6c4 ("drm/nouveau/disp: PIOR DP uses GPIO for HPD, not PMGR AUX interrupts")
On Mon, 14 Aug 2023 16:51:08 +0200, Karol Herbst wrote: > > I've sent a patch out to address this memory corruption > https://patchwork.freedesktop.org/patch/552642/ > > It might or might not fix regressions from the original I2C fix, so > please test and report if there are remaining issues. Thanks! I'll build a test kernel and ask the reporter for testing with it.
2020 Aug 24
4
[PATCH 0/2] drm/nouveau: Backport SOR/PIOR probing fixes for v5.8
These didn't apply cleanly to v5.8, so here's a backported version. Lyude Paul (2): drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps drm/nouveau/kms/nv50-: Log SOR/PIOR caps drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++----- drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 +++++++++ 2 files changed, 29 insertions(+), 6 deletions(-) -- 2.26.2
2020 Aug 07
4
[PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...afterwards to prevent racing with the GPU when reading capabilities. Changes since v1: * Don't just program the DMA notifier offset, make sure to actually perform an update Signed-off-by: Lyude Paul <lyude at redhat.com> Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support") Cc: <stable at vger.kernel.org> # v5.8+ --- drivers/gpu/drm/nouveau/dispnv50/core507d.c | 22 +++++++++++++++++++-- 1 file changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/disp...
2020 Aug 06
3
[PATCH] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...b This is magic nvidia speak for "You need to have the DMA notifier offset programmed before you can call NV507D_GET_CAPABILITIES." So, let's fix this by doing that. Signed-off-by: Lyude Paul <lyude at redhat.com> Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support") Cc: <stable at vger.kernel.org> # v5.8+ --- drivers/gpu/drm/nouveau/dispnv50/core507d.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/dispnv50/core...
2023 Aug 14
2
[PATCH] drm/nouveau/disp: fix use-after-free in error handling of nouveau_connector_create
We can't simply free the connector after calling drm_connector_init on it. We need to clean up the drm side first. It might not fix all regressions from 2b5d1c29f6c4 ("drm/nouveau/disp: PIOR DP uses GPIO for HPD, not PMGR AUX interrupts"), but at least it fixes a memory corruption in error handling related to that commit. Link: https://lore.kernel.org/lkml/20230806213107.GFZNARG6moWpFuSJ9W at fat_crate.local/ Fixes: 95983aea8003 ("drm/nouveau/disp: add connector class")...
2020 Nov 14
0
[PATCH 2/8] drm/nouveau/kms/nv50-: Remove (nv_encoder->crtc) checks in ->disable callbacks
...e, nv_crtc); - nv50_outp_release(nv_encoder); } + + nv_encoder->update(nv_encoder, nv_crtc->index, NULL, 0, 0); + nv50_audio_disable(encoder, nv_crtc); + nv50_hdmi_disable(&nv_encoder->base.base, nv_crtc); + nv50_outp_release(nv_encoder); } static void @@ -1877,8 +1874,8 @@ nv50_pior_disable(struct drm_encoder *encoder, struct drm_atomic_state *state) struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nv50_core *core = nv50_disp(encoder->dev)->core; const u32 ctrl = NVDEF(NV507D, PIOR_SET_CONTROL, OWNER, NONE); - if (nv_encoder->crtc) - core-&...
2017 Jul 15
0
[drm/nouveau] GeForce 8600 GT boot/suspend grumbling
...: *type = SOR; return LVDS; case DCB_OUTPUT_DP : *type = SOR; return DP; default: break; } break; case 1: switch (outp->info.type) { case DCB_OUTPUT_TMDS: *type = PIOR; return TMDS; case DCB_OUTPUT_DP : *type = PIOR; return TMDS; /* not a bug */ default: break; } break; default: break; } WARN_ON(1); return UNKNOWN; } Looks like...
2023 Oct 11
1
[PATCH] drm/nouveau/disp: fix DP capable DSM connectors
...l with this. This resolves user regressions on GPUs with such connectors without reverting the original fix. Cc: Lyude Paul <lyude at redhat.com> Cc: stable at vger.kernel.org # 6.4+ Closes: https://gitlab.freedesktop.org/drm/nouveau/-/issues/255 Fixes: 2b5d1c29f6c4 ("drm/nouveau/disp: PIOR DP uses GPIO for HPD, not PMGR AUX interrupts") Signed-off-by: Karol Herbst <kherbst at redhat.com> --- drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/uconn.c b/...
2020 Aug 24
2
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...> perform an update I'm not sure there's a need to send an Update() method here, I believe GetCapabilities() is an action method on its own right? Ben. > > Signed-off-by: Lyude Paul <lyude at redhat.com> > Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support") > Cc: <stable at vger.kernel.org> # v5.8+ > --- > drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++----- > 1 file changed, 19 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b...
2020 Sep 04
3
[PATCH v5 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...'t forget to check the return value of core507d_read_caps() v5: * Get rid of NV50_DISP_CAPS_NTFY[14], use NV50_DISP_CORE_NTFY * Disable notifier after calling GetCapabilities() Signed-off-by: Lyude Paul <lyude at redhat.com> Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support") Cc: <stable at vger.kernel.org> # v5.8+ --- drivers/gpu/drm/nouveau/dispnv50/core.h | 2 + drivers/gpu/drm/nouveau/dispnv50/core507d.c | 41 ++++++++++++++++++- drivers/gpu/drm/nouveau/dispnv50/core907d.c | 36 +++++++++++++++- drivers/gpu/dr...
2020 May 11
6
[PATCH v3 0/5] drm/nouveau: DP interlace fixes
...ccomplish this by simply reusing more of the SST mode validation we also get (some) basic bw validation for modes we detect on MST connectors completely for free. Lyude Paul (5): drm/nouveau/kms/nv50-: Initialize core channel in nouveau_display_create() drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support drm/nouveau/kms/gv100-: Add support for interlaced modes drm/nouveau/kms/nv50-: Move 8BPC limit for MST into nv50_mstc_get_modes() drm/nouveau/kms/nv50-: Share DP SST mode_valid() handling with MST drivers/gpu/drm/nouveau/dispnv50/core.h | 7 +++...
2020 Nov 14
1
[PATCH 1/8] drm/nouveau/kms/nv50-: Use atomic encoder callbacks everywhere
...ruct drm_encoder *encoder, - struct drm_atomic_state *state) +nv50_sor_enable(struct drm_encoder *encoder, struct drm_atomic_state *state) { struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc); @@ -1873,7 +1872,7 @@ nv50_pior_atomic_check(struct drm_encoder *encoder, } static void -nv50_pior_disable(struct drm_encoder *encoder) +nv50_pior_disable(struct drm_encoder *encoder, struct drm_atomic_state *state) { struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder); struct nv50_core *core = nv50_disp(encode...
2020 Aug 31
1
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...own the boot mode. Not sure about current HW, it might preserve state), and we may not want that to happen there. Ben. > > > Ben. > > > > > Signed-off-by: Lyude Paul <lyude at redhat.com> > > > Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP > > > interlacing support") > > > Cc: <stable at vger.kernel.org> # v5.8+ > > > --- > > > drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++----- > > > 1 file changed, 19 insertions(+), 6 deletions(-) > > &gt...
2020 Sep 01
3
[PATCH v3] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...CAPABILITIES_DONE field lives in a different location than the main NV_DISP_CORE_NOTIFIER_1 field. As well, 907d+ use a different CAPABILITIES_DONE field then pre-907d cards. Signed-off-by: Lyude Paul <lyude at redhat.com> Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support") Cc: <stable at vger.kernel.org> # v5.8+ --- drivers/gpu/drm/nouveau/dispnv50/core.h | 2 ++ drivers/gpu/drm/nouveau/dispnv50/core507d.c | 34 +++++++++++++++++-- drivers/gpu/drm/nouveau/dispnv50/core907d.c | 33 +++++++++++++++++- drivers/gpu...
2017 Jun 28
0
[PATCH] disp/nv50-: bump max chans to 21
...changed, 1 insertion(+), 1 deletion(-) diff --git a/drm/nouveau/nvkm/engine/disp/nv50.h b/drm/nouveau/nvkm/engine/disp/nv50.h index 19c63566..6ea19466 100644 --- a/drm/nouveau/nvkm/engine/disp/nv50.h +++ b/drm/nouveau/nvkm/engine/disp/nv50.h @@ -22,7 +22,7 @@ struct nv50_disp { u8 type[3]; } pior; - struct nv50_disp_chan *chan[17]; + struct nv50_disp_chan *chan[21]; }; void nv50_disp_super_1(struct nv50_disp *); -- 2.13.0
2020 Aug 24
0
[PATCH 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
...afterwards to prevent racing with the GPU when reading capabilities. Changes since v1: * Don't just program the DMA notifier offset, make sure to actually perform an update Signed-off-by: Lyude Paul <lyude at redhat.com> Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support") Cc: <stable at vger.kernel.org> # v5.8+ --- drivers/gpu/drm/nouveau/dispnv50/core507d.c | 25 ++++++++++++++++----- 1 file changed, 19 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/disp...
2009 Nov 27
1
[OT] - Estrutura de armazenamento de uma grande quantidade de arquivos
...de ser armazenada, ? tratada, e salva em 3 tamanhos diferentes. Ou seja, existem 3 c?pias de cada arquivos (4 milh?es / 3). Espa?o em disco n?o ? problema, j? que estas imagens s?o pequenas. O problema maior ? a quantidade mesmo, e a organiza??o. A medida que o numero de arquivos aumenta, fica pior para o SO buscar essa foto. Pra piorar a situa??o, os servidores de aplica??o montam via nfs este storage para buscar os arquivos. Finalmente, o que venho pedir a lista seriam sugest?es de como melhorar a indexa??o/organiza??o destes arquivos. J? pensei em utilizar armazenamento distribu?do (S...
2014 Nov 22
2
[Bug 86566] New: [NV96] nouveau_pmops_suspend returns -16
...ompared mmiotraces from Nouveau and the blob. 0x610200 default values differ greatly - for Nouveau: 0x0d050029, for Nvidia: 0x48000008 - if config=NvForcePost=1 isn't given (the blob is running it by default, not Nouveau); adding ForcePost doesn't help. There are some differences in SOR and PIOR caps but getting them to match the blob ones doesn't help. -- You are receiving this mail because: You are the assignee for the bug. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/nouveau/attachments/20141122/17c0a49a/...
2017 Jul 15
4
[drm/nouveau] GeForce 8600 GT boot/suspend grumbling
Greetings, box: bog standard [tc]rusty old Nvidia equipped Q6600 Medion (Aldi) deskside kernel: master.today (v4.12-11690-gccd5d1b91f22) lspci -nn -d 10de: 01:00.0 VGA compatible controller [0300]: NVIDIA Corporation G84 [GeForce 8600 GT] [10de:0402] (rev a1) abreviated dmesg: ... [ 3.720990] fb: switching to nouveaufb from VESA VGA [ 3.744489] Console: switching to colour dummy device