Displaying 2 results from an estimated 2 matches for "physreg66".
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2015 Dec 21
2
get instruction destination register
Dear Tim,
Thank you for your thorough reply. So, based on your reply I get every
operand and check them to be (isDef && !isimplicit). Now my problem is that
it gives me the physical register number.i.e, for example, instead of r0,
it return %physreg66. Could you please help me on how to convert these
physical register number to the ARM related register? I mean the 15 GPRs in
ARM.
Thank you,
Fami
On Sat, Dec 19, 2015 at 5:02 PM, Tim Northover <t.p.northover at gmail.com>
wrote:
> Hi Fami,
>
> On 19 December 2015 at 11:34, fateme...
2015 Dec 19
2
get instruction destination register
Hello everyone,
I am trying to write a code to do the following:
1. Get an ARM machine instruction
2. Find destination register of that instruction that has been written
3. set a bit in a vector, according to that register number. (Since it's
ARM, I have a 15 bit vector)
It means if I have :
add r0, r1, r0
I want to get r0 as dest reg and set the index 0 of my vector to 1.
I get my machine