search for: phyreg

Displaying 13 results from an estimated 13 matches for "phyreg".

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2007 Apr 24
0
[LLVMdev] Register based vector insert/extract
...erstand arbitrary machine >> instrs in the face of physreg subregs. This lays the groundwork for >> handling vreg subregs, but won't solve it directly. > > Is the work Evan doing a prerequisite for supporting vreg subregs? Sort of. vreg subregs work can start before I finish phyregs subregs support. But unless there are no live-in registers nothing can possibly work. > Is there a PR for the feature Evan is working on? You filed it. PR1306. :-) > >>> Is any of this kind of work planned? The addition of those >>> MRegisterInfo functions has me cur...
2007 Apr 23
2
[LLVMdev] Register based vector insert/extract
Thanks for the detailed response. On Apr 23, 2007, at 4:22 PM, Chris Lattner wrote: > Right. Evan is currently focusing on getting the late stages of > the code > generator (e.g. livevars) to be able to understand arbitrary machine > instrs in the face of physreg subregs. This lays the groundwork for > handling vreg subregs, but won't solve it directly. Is the work Evan
2007 Apr 24
2
[LLVMdev] Register based vector insert/extract
...>>> instrs in the face of physreg subregs. This lays the groundwork for >>> handling vreg subregs, but won't solve it directly. >> >> Is the work Evan doing a prerequisite for supporting vreg subregs? > > Sort of. vreg subregs work can start before I finish phyregs subregs > support. But unless there are no live-in registers nothing can > possibly work. > >> Is there a PR for the feature Evan is working on? > > You filed it. PR1306. :-) Ah! I didn't realize that the issue would have such far reaching consequences. >>>&gt...
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...info will be stored > but still due to loop structure I need to iterate through a single register > 3 - 4 times making it time consuming. > > Yes, I believe you can just do: > > for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { > Oh yes thanks I just forgot that PhyReg starts at 0. > > > -Hal > > > -Vivek > >> >> >> -Hal >> >> >> >> Vivek >> >> On Wed, May 18, 2016 at 11:42 PM, Quentin Colombet <qcolombet at apple.com> >> wrote: >> >>> >>> On May 18,...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...still due to loop structure I need to iterate through a single >> register 3 - 4 times making it time consuming. >> >> Yes, I believe you can just do: >> >> for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { >> > Oh yes thanks I just forgot that PhyReg starts at 0. > >> >> >> -Hal >> >> >> -Vivek >> >>> >>> >>> -Hal >>> >>> >>> >>> Vivek >>> >>> On Wed, May 18, 2016 at 11:42 PM, Quentin Colombet <qcolombet at apple.co...
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...tinct register info will be stored but still due to loop structure I need to iterate through a single register 3 - 4 times making it time consuming. > Yes, I believe you can just do: > > for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { > Oh yes thanks I just forgot that PhyReg starts at 0. > > > -Hal > > > -Vivek > > > -Hal > > > > Vivek > > On Wed, May 18, 2016 at 11:42 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>> wrote: > > On May 18, 2016, at 11:00 AM, vivek p...
2016 May 25
3
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...nfo will be stored but still due to loop structure I need to iterate through a single register 3 - 4 times making it time consuming. >> Yes, I believe you can just do: >> >> for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { >> Oh yes thanks I just forgot that PhyReg starts at 0. >> >> >> -Hal >> >> >> -Vivek >> >> >> -Hal >> >> >> >> Vivek >> >> On Wed, May 18, 2016 at 11:42 PM, Quentin Colombet <qcolombet at apple.com <mailto:qcolombet at apple.com>...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...I need to iterate through a single >>> register 3 - 4 times making it time consuming. >>> >>> Yes, I believe you can just do: >>> >>> for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { >>> >> Oh yes thanks I just forgot that PhyReg starts at 0. >> >>> >>> >>> -Hal >>> >>> >>> -Vivek >>> >>>> >>>> >>>> -Hal >>>> >>>> >>>> >>>> Vivek >>>> >>>> On Wed,...
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...imes making it time consuming. >>>>>>> Yes, I believe you can just do: >>>>>>> >>>>>>> for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { >>>>>> >>>>>> Oh yes thanks I just forgot that PhyReg starts at 0. >>>>>>> >>>>>>> >>>>>>> -Hal >>>>>>> >>>>>>> >>>>>>> -Vivek >>>>>>>> >>>>>>>> >>>>>>&g...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...single >>>> register 3 - 4 times making it time consuming. >>>> >>>> Yes, I believe you can just do: >>>> >>>> for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { >>>> >>> Oh yes thanks I just forgot that PhyReg starts at 0. >>> >>>> >>>> >>>> -Hal >>>> >>>> >>>> -Vivek >>>> >>>>> >>>>> >>>>> -Hal >>>>> >>>>> >>>>> >>&...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
...= 0; Reg < TRI->getNumRegs(); ++Reg) > > > > > > > > { > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > Oh yes thanks I just forgot that PhyReg starts at 0. > > > > > > > > > > > > > > > > > > > > > > > > > > > > > -Hal > > > > > > > > > > > > > > > > > > > > > > > > >...
2016 May 25
0
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
----- Original Message ----- > From: "vivek pandya" <vivekvpandya at gmail.com> > To: "Hal Finkel" <hfinkel at anl.gov> > Cc: "llvm-dev" <llvm-dev at lists.llvm.org>, "Matthias Braun" > <matze at braunis.de>, "Mehdi Amini" <mehdi.amini at apple.com>, "Quentin > Colombet" <qcolombet at
2016 May 25
2
[GSoC 2016] Interprocedural Register Allocation - Introduction and Feedback
On Wed, May 25, 2016 at 3:53 AM, Hal Finkel <hfinkel at anl.gov> wrote: > > ------------------------------ > > *From: *"vivek pandya" <vivekvpandya at gmail.com> > *To: *"Quentin Colombet" <qcolombet at apple.com> > *Cc: *"Hal Finkel" <hfinkel at anl.gov>, "llvm-dev" <llvm-dev at lists.llvm.org>, >