Displaying 5 results from an estimated 5 matches for "pclock".
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2019 Sep 04
1
[RFC PATCH v2] clk: Remove BYPASS_PLL_CHECK from PLLs
...completely fix the issue. I have
tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it
wasn't used nowhere for CLK settings.
Removing this works fine, but I don't know what it's really for.
Actual bit setting this BYPASS_PLL_CHECK is on 0x10:
lookup -ac0 0x137000 0x10
PCLOCK.CLK0_CTRL => { BYPASS_PLL_CHECK | UNK12 = 0 }
Also, disabling this bit on other CLKs doesn't seem to break anything.
v2: Add back PLL lock test
Signed-off-by: Mark Menzynski <mmenzyns at redhat.com>
---
drm/nouveau/nvkm/subdev/clk/gf100.c | 1 -
drm/nouveau/nvkm/subdev/clk/gk104.c |...
2019 Sep 06
1
[PATCH v3] clk: Restore BYPASS_PLL_CHECK from PLLs
...completely fix the issue. I have
tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it
wasn't used nowhere for CLK settings.
Removing this works fine, but I don't know what it's really for.
Actual bit setting this BYPASS_PLL_CHECK is on 0x10:
lookup -ac0 0x137000 0x10
PCLOCK.CLK0_CTRL => { BYPASS_PLL_CHECK | UNK12 = 0 }
Also, disabling this bit on other CLKs doesn't seem to break anything.
v2: add back PLL lock test
v3: add restoring original value after PLL lock test
Signed-off-by: Mark Menzynski <mmenzyns at redhat.com>
---
drm/nouveau/nvkm/subdev/clk...
2019 Sep 04
0
[RFC PATCH] clk: Remove BYPASS_PLL_CHECK from PLLs
...completely fix the issue. I have
tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it
wasn't used nowhere for CLK settings.
Removing this works fine, but I don't know what it's really for.
Actual bit setting this BYPASS_PLL_CHECK is on 0x10:
lookup -ac0 0x137000 0x10
PCLOCK.CLK0_CTRL => { BYPASS_PLL_CHECK | UNK12 = 0 }
Also, disabling this bit on other CLKs doesn't seem to break anything.
Tested with GF119 NVS 310.
Signed-off-by: Mark Menzynski <mmenzyns at redhat.com>
---
drm/nouveau/nvkm/subdev/clk/gf100.c | 8 --------
drm/nouveau/nvkm/subdev/clk/gk1...
2019 Sep 09
0
[PATCH v4] clk: Restore BYPASS_PLL_CHECK from PLLs
...completely fix the issue. I have
tried to search this BYPASS_PLL_CHECK in Nvidia traces but seemed it
wasn't used nowhere for CLK settings.
Removing this works fine, but I don't know what it's really for.
Actual bit setting this BYPASS_PLL_CHECK is on 0x10:
lookup -ac0 0x137000 0x10
PCLOCK.CLK0_CTRL => { BYPASS_PLL_CHECK | UNK12 = 0 }
Also, disabling this bit on other CLKs doesn't seem to break anything.
v2: add back PLL lock test
v3: add restoring original value after PLL lock test
v4: read the bit with nvkm_mask
Signed-off-by: Mark Menzynski <mmenzyns at redhat.com>...
2020 Feb 02
0
Wine release 5.1
...e %I length modifier to print pointer-size integers.
strmbase: Fix printing negative values in debugstr_time().
quartz: Introduce a helper to trace reference time.
strmbase: Store the filter name and graph directly in the strmbase_filter structure.
strmbase: Rename the "pClock" member of struct strmbase_filter to "clock".
strmbase: Trace the filter name in IBaseFilter methods.
strmbase: Trace the pin and filter names in IPin and IMemInputPin methods.
ntdll/tests: Add more tests for printf format specifiers.
ntdll: Support the %I for...