Displaying 20 results from an estimated 77 matches for "pci_vendor_id_intel".
2020 May 12
1
[PATCH 1/3] drm/radeon: remove AGP support
...; - u32 chip_device;
> - u32 subsys_vendor;
> - u32 subsys_device;
> - u32 default_mode;
> -};
> -
> -static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
> - /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
> - { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
> - /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
> - { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
> - /* Intel 82865G/PE/P DRAM Controller/...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...to "skip" this now blacklisted device.
*/
-static void __devinit quirk_mellanox_tavor(struct pci_dev *dev)
+static void quirk_mellanox_tavor(struct pci_dev *dev)
{
dev->broken_parity_status = 1; /* This device gives false positives */
}
@@ -83,7 +83,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p
This appears to be BIOS not version dependent. So presumably there is a
chipset level fix */
-static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
+static void quirk_isa_dma_hangs(struct pci_dev *dev)
{
if (!isa_dma_bridge_buggy) {...
2012 Nov 19
0
[PATCH 242/493] pci: remove use of __devinit
...to "skip" this now blacklisted device.
*/
-static void __devinit quirk_mellanox_tavor(struct pci_dev *dev)
+static void quirk_mellanox_tavor(struct pci_dev *dev)
{
dev->broken_parity_status = 1; /* This device gives false positives */
}
@@ -83,7 +83,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p
This appears to be BIOS not version dependent. So presumably there is a
chipset level fix */
-static void __devinit quirk_isa_dma_hangs(struct pci_dev *dev)
+static void quirk_isa_dma_hangs(struct pci_dev *dev)
{
if (!isa_dma_bridge_buggy) {...
2020 May 11
0
[PATCH 1/3] drm/radeon: remove AGP support
...u32 hostbridge_device;
- u32 chip_vendor;
- u32 chip_device;
- u32 subsys_vendor;
- u32 subsys_device;
- u32 default_mode;
-};
-
-static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
- /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
- { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
- /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
- { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
- /* Intel 82865G/PE/P DRAM Controller/Host-Hub / RV28...
2012 Jan 24
2
[PATCH 26/28] pci: convert to QEMU Object Model
...PCIDeviceInfo ac97_info = {
- .qdev.name = "AC97",
- .qdev.desc = "Intel 82801AA AC97 Audio",
- .qdev.size = sizeof (AC97LinkState),
- .qdev.vmsd = &vmstate_ac97,
- .init = ac97_initfn,
- .exit = ac97_exitfn,
- .vendor_id = PCI_VENDOR_ID_INTEL,
- .device_id = PCI_DEVICE_ID_INTEL_82801AA_5,
- .revision = 0x01,
- .class_id = PCI_CLASS_MULTIMEDIA_AUDIO,
- .qdev.props = (Property[]) {
- DEFINE_PROP_UINT32("use_broken_id", AC97LinkState, use_broken_id, 0),
- DEFINE_PROP_END_OF_LIST(),
- }
+s...
2009 Apr 03
0
[PATCH] PCI: sync up the SR-IOV changes between Dom0 and upstream kernels
...ci_write_config_dword(dev, PCI_BASE_ADDRESS_1, 0);
+ pci_write_config_dword(dev, pos + PCI_SRIOV_BAR, start);
+ pci_write_config_dword(dev, pos + PCI_SRIOV_BAR + 12, start + size / 2);
dev_info(&dev->dev, "use Flash Memory Space for SR-IOV BARs\n");
}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10c9, intel_82576_quirk);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e6, intel_82576_quirk);
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10e7, intel_82576_quirk);
-#endif /* CONFIG_PCI_IOV */
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x10c9, quirk_i82576_sriov);
+DECLARE_PCI_FI...
2020 May 11
2
[PATCH 1/3] drm/radeon: remove AGP support
...u32 subsys_vendor;
> - u32 subsys_device;
> - u32 default_mode;
> -};
> -
> -static struct radeon_agpmode_quirk radeon_agpmode_quirk_list[] = {
> - /* Intel E7505 Memory Controller Hub / RV350 AR [Radeon 9600XT] Needs AGPMode 4 (deb #515326) */
> - { PCI_VENDOR_ID_INTEL, 0x2550, PCI_VENDOR_ID_ATI, 0x4152, 0x1458, 0x4038, 4},
> - /* Intel 82865G/PE/P DRAM Controller/Host-Hub / Mobility 9800 Needs AGPMode 4 (deb #462590) */
> - { PCI_VENDOR_ID_INTEL, 0x2570, PCI_VENDOR_ID_ATI, 0x4a4e, PCI_VENDOR_ID_DELL, 0x5106, 4},
> - /* Intel 82865G/PE/...
2013 Sep 05
0
[PATCH RESEND v3 1/7] Intel MIC Host Driver for X100 family.
...#include <linux/module.h>
+#include <linux/pci.h>
+
+#include "../common/mic_device.h"
+#include "mic_device.h"
+#include "mic_x100.h"
+
+static const char mic_driver_name[] = "mic";
+
+static DEFINE_PCI_DEVICE_TABLE(mic_pci_tbl) = {
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2250)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2251)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2252)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2253)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2254)},
+ {PCI_DEVICE(PCI_...
2013 Aug 08
0
[PATCH v2 1/7] Intel MIC Host Driver for X100 family.
...+ * 2) Enable per vring interrupt support.
+ */
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/pci.h>
+
+#include "mic_common.h"
+
+static const char mic_driver_name[] = "mic";
+
+static DEFINE_PCI_DEVICE_TABLE(mic_pci_tbl) = {
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2250)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2251)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2252)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2253)},
+ {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MIC_X100_PCI_DEVICE_2254)},
+ {PCI_DEVICE(PCI_...
2020 May 11
10
[RFC] Remove AGP support from Radeon/Nouveau/TTM
Hi guys,
Well let's face it AGP is a total headache to maintain and dead for at least 10+ years.
We have a lot of x86 specific stuff in the architecture independent graphics memory management to get the caching right, abusing the DMA API on multiple occasions, need to distinct between AGP and driver specific page tables etc etc...
So the idea here is to just go ahead and remove the support
2011 Nov 27
5
[PATCH] qemu-xen: Intel GPU passthrough, fix OpRegion mapping.
The OpRegion shouldn''t be mapped 1:1 because the address in the host
can''t be used in the guest directly.
This patch traps read and write access to the opregion of the Intel
GPU config space (offset 0xfc).
To work correctly this patch needs a change in hvmloader.
HVMloader will allocate 2 pages for the OpRegion and write this address
on the config space of the Intel GPU. Qemu
2023 Nov 14
7
[PATCH v3 0/7] Improvements to pcie_bandwidth_available() for eGPUs
The wrong values are reported from pcie_bandwidth_available() which
can cause problems for performance of eGPUs.
This series overhauls Thunderbolt related device detection and uses
the changes to change the behavior of pcie_bandwidth_available().
v2->v3:
* Stop lumping all thunderbolt VSEC and USB4 devices together, introduce
is_virtual_link instead
* Drop unnecessary patches
Mario
2013 Jul 24
4
[PATCH 2/3] V5 qemu-xen-trad: Correctly expose PCH ISA bridge for IGD passthrough
...-through.h"
+#include "pci.h"
#include "pci/header.h"
#include "pci/pci.h"
@@ -40,9 +41,11 @@ void intel_pch_init(PCIBus *bus)
did = pt_pci_host_read(pci_dev_1f, PCI_DEVICE_ID, 2);
rid = pt_pci_host_read(pci_dev_1f, PCI_REVISION, 1);
- if ( vid == PCI_VENDOR_ID_INTEL )
- pci_bridge_init(bus, PCI_DEVFN(0x1f, 0), vid, did, rid,
- pch_map_irq, "intel_bridge_1f");
+ if (vid == PCI_VENDOR_ID_INTEL) {
+ pci_isa_bridge_init(bus, PCI_DEVFN(0x1f, 0), vid, did, rid,
+ pch_map_irq, "intel_br...
2019 Oct 16
2
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...CI_DEV_FLAGS_NO_D3 flag for this instead of
> adding a new flag?
>
> I would put the parent_broken_child_pm() logic here, if possible,
> e.g., something like:
>
> struct pci_dev *bridge = pci_upstream_bridge(dev);
>
> if (bridge &&
> bridge->vendor == PCI_VENDOR_ID_INTEL && bridge->device == 0x1901)
> dev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
>
> > +}
> > +DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
> > + PCI_BASE_CLASS_DISPLAY, 16,
> > + quirk_b...
2018 Aug 31
0
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
...> + u32 value;
> +
> + if (strcmp(sys_vendor, "ASUSTeK COMPUTER INC.") != 0)
> + return;
> +
> + pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &value);
> + pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, value);
> +}
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x1901, quirk_asus_pci_prefetch);
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x31d8, quirk_asus_pci_prefetch);
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x5ad8, quirk_asus_pci_prefetch);
> +DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_asus_pci_prefetch);
> +...
2019 Oct 16
4
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...non laptop systems.
+ */
+
+static void quirk_broken_nv_runpm(struct pci_dev *dev)
+{
+ dev->broken_nv_runpm = 1;
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
+ PCI_BASE_CLASS_DISPLAY, 16,
+ quirk_broken_nv_runpm);
+/* kaby lake */
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1901,
+ quirk_broken_nv_runpm);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index ac8a6c4e1792..903a0b3a39ec 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -416,6 +416,7 @@ struct pci_dev {
unsigned int __aer_firmware_first_valid:1;
unsigned int __aer_firmware_fir...
2019 Oct 17
4
[PATCH v4] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...hance of there being a bug
+ * in the bridge controller rather than in the GPU.
+ *
+ * This issue was not able to be reproduced on non laptop systems.
+ */
+
+static void quirk_broken_nv_runpm(struct pci_dev *dev)
+{
+ struct pci_dev *bridge = pci_upstream_bridge(dev);
+
+ if (bridge->vendor == PCI_VENDOR_ID_INTEL &&
+ bridge->device == 0x1901)
+ dev->broken_nv_runpm = 1;
+}
+DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
+ PCI_BASE_CLASS_DISPLAY, 16,
+ quirk_broken_nv_runpm);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index ac8a6c4e1792..903a0b...
2019 Oct 16
0
[PATCH v3] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
..._nv_runpm = 1;
Can you use the existing PCI_DEV_FLAGS_NO_D3 flag for this instead of
adding a new flag?
I would put the parent_broken_child_pm() logic here, if possible,
e.g., something like:
struct pci_dev *bridge = pci_upstream_bridge(dev);
if (bridge &&
bridge->vendor == PCI_VENDOR_ID_INTEL && bridge->device == 0x1901)
dev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
> +}
> +DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
> + PCI_BASE_CLASS_DISPLAY, 16,
> + quirk_broken_nv_runpm);
> +/* kaby lake */
> +DECLARE_PCI_FIXUP_FINAL(PCI...
2020 Mar 10
2
[PATCH v7] pci: prevent putting nvidia GPUs into lower device states on certain intel bridges
...ration Intel? Processor Families for H Platforms Datasheet Volume 2"
+ * Section "12 PCI Express* Controller (x16) Registers"
+ */
+
+static void quirk_broken_nv_runpm(struct pci_dev *dev)
+{
+ struct pci_dev *bridge = pci_upstream_bridge(dev);
+
+ if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
+ return;
+
+ switch (bridge->device) {
+ case 0x1901:
+ dev->parent_d3cold = 1;
+ break;
+ }
+}
+
static int nouveau_drm_probe(struct pci_dev *pdev,
const struct pci_device_id *pent)
{
@@ -699,6 +753,7 @@ static int nouveau_drm_probe(struct pci_dev *pdev,
if (ret)
goto fa...
2018 Aug 31
6
[PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues
...endor = dmi_get_system_info(DMI_SYS_VENDOR);
+ u32 value;
+
+ if (strcmp(sys_vendor, "ASUSTeK COMPUTER INC.") != 0)
+ return;
+
+ pci_read_config_dword(bridge, PCI_PREF_BASE_UPPER32, &value);
+ pci_write_config_dword(bridge, PCI_PREF_BASE_UPPER32, value);
+}
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x1901, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x31d8, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x5ad8, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, 0x9d10, quirk_asus_pci_prefetch);
+DECLARE_PCI_FIXUP_RE...