Displaying 16 results from an estimated 16 matches for "pci_capability_list".
2009 May 25
2
[PATCH 03/11] qemu: add routines to manage PCI capabilities
...turn offset;
+ return 0;
+}
+
+static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
+ uint8_t *prev_p)
+{
+ uint8_t next, prev;
+
+ if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
+ return 0;
+
+ for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
+ prev = next + PCI_CAP_LIST_NEXT)
+ if (pdev->config[next + PCI_CAP_LIST_ID] != cap_id)
+ break;
+
+ *prev_p = prev;
+ return next;
+}
+
+/* Reserve space and add capability to the linked list in pci config space */
+int pci_add_c...
2009 May 25
2
[PATCH 03/11] qemu: add routines to manage PCI capabilities
...turn offset;
+ return 0;
+}
+
+static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
+ uint8_t *prev_p)
+{
+ uint8_t next, prev;
+
+ if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
+ return 0;
+
+ for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
+ prev = next + PCI_CAP_LIST_NEXT)
+ if (pdev->config[next + PCI_CAP_LIST_ID] != cap_id)
+ break;
+
+ *prev_p = prev;
+ return next;
+}
+
+/* Reserve space and add capability to the linked list in pci config space */
+int pci_add_c...
2009 Jun 05
1
[PATCHv3 03/13] qemu: add routines to manage PCI capabilities
...turn offset;
+ return 0;
+}
+
+static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
+ uint8_t *prev_p)
+{
+ uint8_t next, prev;
+
+ if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
+ return 0;
+
+ for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
+ prev = next + PCI_CAP_LIST_NEXT)
+ if (pdev->config[next + PCI_CAP_LIST_ID] == cap_id)
+ break;
+
+ *prev_p = prev;
+ return next;
+}
+
+/* Reserve space and add capability to the linked list in pci config space */
+int pci_add_c...
2009 Jun 05
1
[PATCHv3 03/13] qemu: add routines to manage PCI capabilities
...turn offset;
+ return 0;
+}
+
+static uint8_t pci_find_capability_list(PCIDevice *pdev, uint8_t cap_id,
+ uint8_t *prev_p)
+{
+ uint8_t next, prev;
+
+ if (!(pdev->config[PCI_STATUS] & PCI_STATUS_CAP_LIST))
+ return 0;
+
+ for (prev = PCI_CAPABILITY_LIST; (next = pdev->config[prev]);
+ prev = next + PCI_CAP_LIST_NEXT)
+ if (pdev->config[next + PCI_CAP_LIST_ID] == cap_id)
+ break;
+
+ *prev_p = prev;
+ return next;
+}
+
+/* Reserve space and add capability to the linked list in pci config space */
+int pci_add_c...
2009 Jun 21
0
[PATCHv6 04/12] qemu/pci: check constant registers on load
...gt;cmask + PCI_DEVICE_ID, 0xffff);
+ dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST;
+ dev->cmask[PCI_REVISION_ID] = 0xff;
+ dev->cmask[PCI_CLASS_PROG] = 0xff;
+ pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff);
+ dev->cmask[PCI_HEADER_TYPE] = 0xff;
+ dev->cmask[PCI_CAPABILITY_LIST] = 0xff;
+}
+
static void pci_init_wmask(PCIDevice *dev)
{
int i;
@@ -267,6 +285,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
memset(pci_dev->irq_state, 0, sizeof(pci_dev->irq_state))...
2009 Jun 21
0
[PATCHv6 04/12] qemu/pci: check constant registers on load
...gt;cmask + PCI_DEVICE_ID, 0xffff);
+ dev->cmask[PCI_STATUS] = PCI_STATUS_CAP_LIST;
+ dev->cmask[PCI_REVISION_ID] = 0xff;
+ dev->cmask[PCI_CLASS_PROG] = 0xff;
+ pci_set_word(dev->cmask + PCI_CLASS_DEVICE, 0xffff);
+ dev->cmask[PCI_HEADER_TYPE] = 0xff;
+ dev->cmask[PCI_CAPABILITY_LIST] = 0xff;
+}
+
static void pci_init_wmask(PCIDevice *dev)
{
int i;
@@ -267,6 +285,7 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
pstrcpy(pci_dev->name, sizeof(pci_dev->name), name);
memset(pci_dev->irq_state, 0, sizeof(pci_dev->irq_state))...
2009 May 20
0
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
...return s->bus;
}
+void pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pdev->cap.start + pdev->cap.length;
+ uint8_t *config = pdev->config + offset;
+ config[PCI_CAP_LIST_ID] = cap_id;
+ config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
+ pdev->config[PCI_CAPABILITY_LIST] = offset;
+ pdev->cap.length += size;
+ pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
+}
+
+void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pci_find_capability(pdev, cap_id);
+ uint8_t *con...
2009 May 20
0
[PATCHv2-RFC 1/2] qemu-kvm: add MSI-X support
...return s->bus;
}
+void pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pdev->cap.start + pdev->cap.length;
+ uint8_t *config = pdev->config + offset;
+ config[PCI_CAP_LIST_ID] = cap_id;
+ config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
+ pdev->config[PCI_CAPABILITY_LIST] = offset;
+ pdev->cap.length += size;
+ pdev->config[PCI_STATUS] |= PCI_STATUS_CAP_LIST;
+}
+
+void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pci_find_capability(pdev, cap_id);
+ uint8_t *con...
2009 May 11
0
[PATCH 1/2] qemu-kvm: add MSI-X support
...return s->bus;
}
+void pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pdev->cap.start + pdev->cap.length;
+ uint8_t *config = pdev->config + offset;
+ config[PCI_CAP_LIST_ID] = cap_id;
+ config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
+ pdev->config[PCI_CAPABILITY_LIST] = offset;
+ pdev->cap.length += size;
+}
+
+void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pdev->config[PCI_CAPABILITY_LIST];
+ uint8_t *config = pdev->config + offset;
+ if (config[PCI_CA...
2009 May 11
0
[PATCH 1/2] qemu-kvm: add MSI-X support
...return s->bus;
}
+void pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pdev->cap.start + pdev->cap.length;
+ uint8_t *config = pdev->config + offset;
+ config[PCI_CAP_LIST_ID] = cap_id;
+ config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
+ pdev->config[PCI_CAPABILITY_LIST] = offset;
+ pdev->cap.length += size;
+}
+
+void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
+{
+ uint8_t offset = pdev->config[PCI_CAPABILITY_LIST];
+ uint8_t *config = pdev->config + offset;
+ if (config[PCI_CA...
2019 Nov 08
0
[PATCH 1/2] IFC hardware operation layer
...< 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *dev)
> +{
> + struct virtio_pci_cap cap;
> + u16 notify_off;
> + int ret;
> + u8 pos;
> + u32 i;
> +
> + ret = pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
> +
> + if (ret < 0) {
> + IFC_ERR(&dev->dev, "Failed to read PCI capability list.\n");
> + return -EIO;
> + }
> +
> + while (pos) {
> + ret = ifcvf_read_config_range(dev, (u32 *)&cap,
> + sizeof(cap), pos);
> +
> +...
2019 Nov 05
1
[PATCH 1/2] IFC hardware operation layer
...< 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *dev)
> +{
> + struct virtio_pci_cap cap;
> + u16 notify_off;
> + int ret;
> + u8 pos;
> + u32 i;
> +
> + ret = pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
> +
> + if (ret < 0) {
> + IFC_ERR(&dev->dev, "Failed to read PCI capability list.\n");
> + return -EIO;
> + }
> +
> + while (pos) {
> + ret = ifcvf_read_config_range(dev, (u32 *)&cap,
> + sizeof(cap), pos);
> +
> +...
2019 Nov 05
0
[PATCH 1/2] IFC hardware operation layer
...< 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *dev)
> +{
> + struct virtio_pci_cap cap;
> + u16 notify_off;
> + int ret;
> + u8 pos;
> + u32 i;
> +
> + ret = pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
> +
> + if (ret < 0) {
> + IFC_ERR(&dev->dev, "Failed to read PCI capability list.\n");
> + return -EIO;
> + }
> +
> + while (pos) {
> + ret = ifcvf_read_config_range(dev, (u32 *)&cap,
> + sizeof(cap), pos);
> +
> +...
2019 Nov 06
0
[PATCH 1/2] IFC hardware operation layer
...< 0)
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *dev)
> +{
> + struct virtio_pci_cap cap;
> + u16 notify_off;
> + int ret;
> + u8 pos;
> + u32 i;
> +
> + ret = pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
> +
> + if (ret < 0) {
> + IFC_ERR(&dev->dev, "Failed to read PCI capability list.\n");
> + return -EIO;
> + }
> +
> + while (pos) {
> + ret = ifcvf_read_config_range(dev, (u32 *)&cap,
> + sizeof(cap), pos);
> +
> +...
2019 Oct 16
0
[RFC 1/2] vhost: IFC VF hardware operation layer
...+ i / 4) < 0)
> + return -1;
> + }
> + return 0;
> +}
> +
> +int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *dev)
> +{
> + int ret;
> + u8 pos;
> + struct virtio_pci_cap cap;
> + u32 i;
> + u16 notify_off;
> +
> + ret = pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
> +
> + if (ret < 0) {
> + IFC_ERR(&dev->dev, "failed to read PCI capability list.\n");
> + return -EIO;
> + }
> +
> + while (pos) {
> + ret = ifcvf_read_config_range(dev, (u32 *)&cap,
> + sizeof(cap), pos);
> +
> + if (ret...
2019 Oct 21
0
[RFC 1/2] vhost: IFC VF hardware operation layer
...+int ifcvf_init_hw(struct ifcvf_hw *hw, struct pci_dev *dev)
>>> +{
>>> +??? int ret;
>>> +??? u8 pos;
>>> +??? struct virtio_pci_cap cap;
>>> +??? u32 i;
>>> +??? u16 notify_off;
>>> +
>>> +??? ret = pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
>>> +
>>> +??? if (ret < 0) {
>>> +??????? IFC_ERR(&dev->dev, "failed to read PCI capability list.\n");
>>> +??????? return -EIO;
>>> +??? }
>>> +
>>> +??? while (pos) {
>>> +??????? ret = ifcvf_...