search for: pci_base_address_mem_type_64

Displaying 13 results from an estimated 13 matches for "pci_base_address_mem_type_64".

2012 Sep 26
3
[PATCH v3] xen/tools: Add 64 bits big bar support
...bar_reg = PCI_ROM_ADDRESS; bar_data = pci_readl(devfn, bar_reg); + is_64bar = !!((bar_data & (PCI_BASE_ADDRESS_SPACE | + PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == + (PCI_BASE_ADDRESS_SPACE_MEMORY | + PCI_BASE_ADDRESS_MEM_TYPE_64)); pci_writel(devfn, bar_reg, ~0); bar_sz = pci_readl(devfn, bar_reg); pci_writel(devfn, bar_reg, bar_data); - if ( bar_sz == 0 ) - continue; bar_sz &= (((bar_data & PCI_BASE_ADDRESS_SPACE) ==...
2017 Mar 20
3
[BUG] virtio-net linux driver fails to probe on MIPS Malta since 'hw/virtio-pci: fix virtio behaviour'
On Mon, Mar 20, 2017 at 05:21:22PM +0200, Marcel Apfelbaum wrote: > On 03/17/2017 11:57 PM, James Hogan wrote: > > Hi, > > > > I've bisected the following failure of the virtio_net linux v4.10 driver > > to probe in QEMU v2.9.0-rc1 emulating a MIPS Malta machine: > > > > virtio_net virtio0: virtio: device uses modern interface but does not have
2017 Mar 20
3
[BUG] virtio-net linux driver fails to probe on MIPS Malta since 'hw/virtio-pci: fix virtio behaviour'
On Mon, Mar 20, 2017 at 05:21:22PM +0200, Marcel Apfelbaum wrote: > On 03/17/2017 11:57 PM, James Hogan wrote: > > Hi, > > > > I've bisected the following failure of the virtio_net linux v4.10 driver > > to probe in QEMU v2.9.0-rc1 emulating a MIPS Malta machine: > > > > virtio_net virtio0: virtio: device uses modern interface but does not have
2010 Oct 08
17
MSI badness in xen-unstable
Hi, I''ve been trying to boot stefano''s minimal dom0 kernel from git://xenbits.xen.org/people/sstabellini/linux-pvhvm.git 2.6.36-rc1-initial-domain-v2+pat On xen-unstable, I get the following WARN_ON()''s from Xen when bringing up the NIC''s, then the machine hangs forever when trying to login either over serial or NIC. (XEN) Xen WARN at msi.c:649 (XEN) ----[
2017 Mar 21
0
[BUG] virtio-net linux driver fails to probe on MIPS Malta since 'hw/virtio-pci: fix virtio behaviour'
...ic void virtio_pci_device_plugged(DeviceState *d, Error **errp) } pci_register_bar(&proxy->pci_dev, proxy->modern_mem_bar_idx, - PCI_BASE_ADDRESS_SPACE_MEMORY | - PCI_BASE_ADDRESS_MEM_PREFETCH | - PCI_BASE_ADDRESS_MEM_TYPE_64, + PCI_BASE_ADDRESS_SPACE_MEMORY, &proxy->modern_bar); proxy->config_cap = virtio_pci_add_mem_cap(proxy, &cfg.cap); Thanks, Marcel
2009 Apr 03
0
[PATCH] PCI: sync up the SR-IOV changes between Dom0 and upstream kernels
...(flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == - PCI_BASE_ADDRESS_MEM_TYPE_32) - goto found; - - i = 2; - flags = pci_resource_flags(dev, i); - if ((flags & PCI_BASE_ADDRESS_SPACE) == - PCI_BASE_ADDRESS_SPACE_MEMORY && - (flags & PCI_BASE_ADDRESS_MEM_TYPE_MASK) == - PCI_BASE_ADDRESS_MEM_TYPE_64) - goto found; - - return; -found: - start = pci_resource_start(dev, i); - size = pci_resource_len(dev, i); + start = pci_resource_start(dev, 1); + size = pci_resource_len(dev, 1); if (!start || size != 0x400000 || start & (size - 1)) return; - pci_write_config_dword(dev, 0x10 + i * 4,...
2008 Aug 12
0
SR-IOV: patches are available for Linux kernel [1/4]
...pdating (%#08x != %#08x)\n", - resno, new, check); + dev_err(&dev->dev, "BAR at %d: error updating " + "(%#08x != %#08x)\n", pos, new, check); } if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) { new = region.start >> 16 >> 16; - pci_write_config_dword(dev, reg + 4, new); - pci_read_config_dword(dev, reg + 4, &check); + pci_write_config_dword(dev, pos + 4, new); + pci_read_config_dword(dev, pos + 4, &check); if (check != new) { - dev_err(&dev->dev,...
2008 Aug 12
0
SR-IOV: patches are available for Linux kernel [1/4]
...pdating (%#08x != %#08x)\n", - resno, new, check); + dev_err(&dev->dev, "BAR at %d: error updating " + "(%#08x != %#08x)\n", pos, new, check); } if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) { new = region.start >> 16 >> 16; - pci_write_config_dword(dev, reg + 4, new); - pci_read_config_dword(dev, reg + 4, &check); + pci_write_config_dword(dev, pos + 4, new); + pci_read_config_dword(dev, pos + 4, &check); if (check != new) { - dev_err(&dev->dev,...
2008 Aug 12
0
SR-IOV: patches are available for Linux kernel [1/4]
...pdating (%#08x != %#08x)\n", - resno, new, check); + dev_err(&dev->dev, "BAR at %d: error updating " + "(%#08x != %#08x)\n", pos, new, check); } if ((new & (PCI_BASE_ADDRESS_SPACE|PCI_BASE_ADDRESS_MEM_TYPE_MASK)) == (PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TYPE_64)) { new = region.start >> 16 >> 16; - pci_write_config_dword(dev, reg + 4, new); - pci_read_config_dword(dev, reg + 4, &check); + pci_write_config_dword(dev, pos + 4, new); + pci_read_config_dword(dev, pos + 4, &check); if (check != new) { - dev_err(&dev->dev,...
2023 Apr 27
4
[RFC PATCH v2 0/3] Introduce a PCIe endpoint virtio console
PCIe endpoint framework provides APIs to implement PCIe endpoint function. This framework allows defining various PCIe endpoint function behaviors in software. This patch extend the framework for virtio pci device. The virtio is defined to communicate guest on virtual machine and host side. Advantage of the virtio is the efficiency of data transfer and the conciseness of implementation device
2011 Jun 02
0
[PATCH] pci: Use pr_<level> and pr_fmt
...], &bar[count]); - debug ("after writing, start address is %x\n", bar[count]); + debug("after writing, start address is %x\n", + bar[count]); /*_________________________________________________________________________________*/ if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { /* takes up another dword */ - debug ("inside the mem 64 case, count %d\n", count); + debug("inside the mem 64 case, count %d\n", + count); count += 1; /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ pci_bus_wr...
2011 Jun 02
0
[PATCH] pci: Use pr_<level> and pr_fmt
...], &bar[count]); - debug ("after writing, start address is %x\n", bar[count]); + debug("after writing, start address is %x\n", + bar[count]); /*_________________________________________________________________________________*/ if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { /* takes up another dword */ - debug ("inside the mem 64 case, count %d\n", count); + debug("inside the mem 64 case, count %d\n", + count); count += 1; /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ pci_bus_wr...
2011 Jun 02
0
[PATCH] pci: Use pr_<level> and pr_fmt
...], &bar[count]); - debug ("after writing, start address is %x\n", bar[count]); + debug("after writing, start address is %x\n", + bar[count]); /*_________________________________________________________________________________*/ if (bar[count] & PCI_BASE_ADDRESS_MEM_TYPE_64) { /* takes up another dword */ - debug ("inside the mem 64 case, count %d\n", count); + debug("inside the mem 64 case, count %d\n", + count); count += 1; /* on the 2nd dword, write all 0s, since we can't handle them n.e.ways */ pci_bus_wr...