Displaying 3 results from an estimated 3 matches for "ovf_bit".
Did you mean:
avx_bit
2014 Apr 26
3
[LLVMdev] Proposal: add intrinsics for safe division
On Apr 25, 2014, at 2:21 PM, Eric Christopher <echristo at gmail.com> wrote:
>> In short, I agree with your observations that these intrinsics are not an
>> obvious slam-dunk compared to making the explicit control flow, but I think
>> that the intrinsics do give enough flexibility on the LLVM side that it
>> would be great if front-ends used them rather than rolling
2014 Apr 26
2
[LLVMdev] Proposal: add intrinsics for safe division
...h "|0" ***
> %divr = call %safe.sdiv(%x, %y)
> %div = extractvalue %divr, 0
>
> *** JavaScript without "|0", Ruby and maybe others ***
> %divr = call %safe.sdiv(%x, %y)
> %div = extractvalue %divr, 0
> %divbyzero_bit = extractvalue %divr, 1
> %ovf_bit = extractvalue %divr, 2
> %exceptional_case_bit = or %ovf_bit, %divbyzero_bit
> br i1 %exceptional_case_bit, label %handle_exceptional_case, label
> %normal
>
>
> Now let's write the IR for the same expression without the intrinsics:
>
> *** C/C-like ***
> %div...
2014 Apr 29
2
[LLVMdev] Proposal: add intrinsics for safe division
...%x, %y)
>> %div = extractvalue %divr, 0
>>
>> *** JavaScript without "|0", Ruby and maybe others ***
>> %divr = call %safe.sdiv(%x, %y)
>> %div = extractvalue %divr, 0
>> %divbyzero_bit = extractvalue %divr, 1
>> %ovf_bit = extractvalue %divr, 2
>> %exceptional_case_bit = or %ovf_bit, %divbyzero_bit
>> br i1 %exceptional_case_bit, label %handle_exceptional_case,
>> label %normal
>>
>>
>> Now let's write the IR for the same expression without the
>>...