Displaying 4 results from an estimated 4 matches for "avx_bit".
2020 Feb 07
0
[RFC PATCH v7 64/78] KVM: introspection: add KVMI_EVENT_XSETBV
..., u64 value)
+{
+ u32 eax = value;
+ u32 edx = value >> 32;
+
+ asm volatile(".byte 0x0f,0x01,0xd1" /* xsetbv */
+ : : "a" (eax), "d" (edx), "c" (index));
+}
+
+static void guest_xsetbv_test(void)
+{
+ const int SSE_BIT = 1 << 1;
+ const int AVX_BIT = 1 << 2;
+ u64 xcr0;
+
+ /* avoid #UD */
+ set_cr4(get_cr4() | X86_CR4_OSXSAVE);
+
+ xcr0 = xgetbv(0);
+ if (xcr0 & AVX_BIT)
+ xcr0 &= ~AVX_BIT;
+ else
+ xcr0 |= (AVX_BIT | SSE_BIT);
+
+ xsetbv(0, xcr0);
+}
+
static void guest_code(void)
{
while (true) {
@@ -99,6 +141,9 @@ stat...
2020 Jul 21
0
[PATCH v9 68/84] KVM: introspection: add KVMI_EVENT_XSETBV
..., u64 value)
+{
+ u32 eax = value;
+ u32 edx = value >> 32;
+
+ asm volatile(".byte 0x0f,0x01,0xd1" /* xsetbv */
+ : : "a" (eax), "d" (edx), "c" (index));
+}
+
+static void guest_xsetbv_test(void)
+{
+ const int SSE_BIT = 1 << 1;
+ const int AVX_BIT = 1 << 2;
+ u64 xcr0;
+
+ /* avoid #UD */
+ set_cr4(get_cr4() | X86_CR4_OSXSAVE);
+
+ xcr0 = xgetbv(0);
+ if (xcr0 & AVX_BIT)
+ xcr0 &= ~AVX_BIT;
+ else
+ xcr0 |= (AVX_BIT | SSE_BIT);
+
+ xsetbv(0, xcr0);
+}
+
static void guest_code(void)
{
while (true) {
@@ -104,6 +146,9 @@ sta...
2020 Feb 07
78
[RFC PATCH v7 00/78] VM introspection
The KVM introspection subsystem provides a facility for applications
running on the host or in a separate VM, to control the execution of
other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs,
MSRs etc.), alter the page access bits in the shadow page tables (only
for the hardware backed ones, eg. Intel's EPT) and receive notifications
when events of interest have taken place
2020 Jul 21
87
[PATCH v9 00/84] VM introspection
The KVM introspection subsystem provides a facility for applications
running on the host or in a separate VM, to control the execution of
other VMs (pause, resume, shutdown), query the state of the vCPUs (GPRs,
MSRs etc.), alter the page access bits in the shadow page tables (only
for the hardware backed ones, eg. Intel's EPT) and receive notifications
when events of interest have taken place