search for: opsize16

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2014 Jun 24
2
[LLVMdev] Bug in LEA16r (X86InstrArithmetic.td) ??
Hi, in X86InstrArithmetic.td, we have LEA16r defined as: def LEA16r : I<0x8D, MRMSrcMem, (outs GR16:$dst), (ins i32mem:$src), "lea{w}\t{$src|$dst}, {$dst|$src}", [], IIC_LEA_16>, OpSize16; Please correct me if I am wrong, but I think "ins i32mem" should be "ins i16mem" because this is about 16bit register? So is this a bug? Thanks, Jun -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev...
2015 Mar 24
3
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86)
...)], IIC_MOV_MEM>; -def MOV16mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), +def MOV16mr : I<0x89, MRMDestMem, (outs i16mem:$dst), (ins GR16:$src), "mov{w}\t{$src, $dst|$dst, $src}", [(store GR16:$src, addr:$dst)], IIC_MOV_MEM>, OpSize16; def MOV32mr : I<0x89, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src), -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150324/4e58d04d/attachment.html>
2018 Mar 28
0
x86 instruction format which takes a single 64-bit immediate
...Imm(default) Imm8 Imm8PCRel Imm8Reg - 8-bits with a register encoded in bits 7:4 Imm16 Imm16PCRel Imm32 - 32-bit immediate Imm32PCRel Imm32S - 32-bit immediate that is sign extended to 64-bits. Imm64 Opsize ------ OpSizeFixed(default) - Operand size isn't mode dependent OpSize16 - 0x66 prefix required in 32-bit mode OpSize32 - 0x66 prefix required in 16-bit mode OpSizeIgnored - 0x66 prefix should be ignored if present. Adsize ------ AdSizeX(default) - Address size prefix determined from memory operand registers encoded in modrm byte A...
2018 Mar 28
4
x86 instruction format which takes a single 64-bit immediate
I am attempting to create an instruction which takes a single 64-bit immediate. This doesn't seem like a thing that would exist already (because who needs an instruction which just takes an immediate?) How might I implement this easily? Perhaps I could use a format which encodes a register, which is then unused? Thanks for the help. Gus -------------- next part -------------- An HTML
2014 Jun 24
2
[LLVMdev] Bug in LEA16r (X86InstrArithmetic.td) ??
...Jun, > > On 24 June 2014 08:08, Jun Koi <junkoi2004 at gmail.com> wrote: > > def LEA16r : I<0x8D, MRMSrcMem, > > (outs GR16:$dst), (ins i32mem:$src), > > "lea{w}\t{$src|$dst}, {$dst|$src}", [], IIC_LEA_16>, > > OpSize16; > > > > > > Please correct me if I am wrong, but I think "ins i32mem" should be "ins > > i16mem" because this is about 16bit register? > > I think there's something going on here, but it's probably more > complicated than that. The lea i...
2015 Mar 25
3
[LLVMdev] [PATCH] fix outs/ins of MOV16mr instruction (X86)
...6mr : I<0x89, MRMDestMem, (outs), (ins i16mem:$dst, GR16:$src), > > +def MOV16mr : I<0x89, MRMDestMem, (outs i16mem:$dst), (ins GR16:$src), > > "mov{w}\t{$src, $dst|$dst, $src}", > > [(store GR16:$src, addr:$dst)], IIC_MOV_MEM>, OpSize16; > > Why? i16mem here stands for the pointer, not the actual memory. A > store doesn't define a pointer, so why would it be in "outs"? > Then why does this "i16mem:$dst" belongs to "ins"? Is that wrong, correct? Also, what's special about i16?...