Displaying 20 results from an estimated 23 matches for "op_add".
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yp_add
2014 May 18
1
[PATCH 1/2] nv50/ir: fix s32 x s32 -> high s32 multiply logic
...getSSA(1, FILE_FLAGS);
c[1] = bld->getSSA(1, FILE_FLAGS);
- for (int j = 0; j < 4; ++j)
+ for (int j = 0; j < 5; ++j)
r[j] = bld->getSSA(fullSize);
i[8] = bld->mkOp2(OP_SHR, fTy, r[0], t[1], bld->mkImm(halfSize * 8));
i[6] = bld->mkOp2(OP_ADD, fTy, r[1], r[0], imm);
bld->mkMov(r[3], r[0])->setPredicate(CC_NC, c[0]);
bld->mkOp2(OP_UNION, TYPE_U32, r[2], r[1], r[3]);
- i[5] = bld->mkOp3(OP_MAD, fTy, mul->getDef(0), a[1], b[1], r[2]);
+ i[5] = bld->mkOp3(OP_MAD, fTy, r[4], a[1], b[1], r[2]);...
2015 Jan 01
0
[PATCH] nv50/ir: fold MAD when one of the multiplicands is const
...(t).mod ^ Modifier(NV50_IR_MOD_NEG);
+ if (s == 0) {
+ i->setSrc(0, i->getSrc(1));
+ i->src(0).mod = i->src(1).mod;
+ }
+ i->setSrc(1, i->getSrc(2));
+ i->src(1).mod = 0;
+ i->setSrc(2, NULL);
+ i->op = OP_ADD;
+ }
+ break;
case OP_ADD:
if (i->usesFlags())
break;
--
2.0.5
2014 Aug 08
2
[PATCH 1/3] nvc0/ir: add base tex offset for fermi indirect tex case
...Pass::handleTEX(TexInstruction *i)
Value *ticRel = i->getIndirectR();
Value *tscRel = i->getIndirectS();
- if (ticRel)
+ if (ticRel) {
i->setSrc(i->tex.rIndirectSrc, NULL);
- if (tscRel)
+ if (i->tex.r)
+ ticRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(),
+ ticRel, bld.mkImm(i->tex.r));
+ }
+ if (tscRel) {
i->setSrc(i->tex.sIndirectSrc, NULL);
+ if (i->tex.s)
+ tscRel = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getScratch(),
+...
2016 Mar 17
4
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...default:
- assert(atom->src(0).getFile() == FILE_MEMORY_GLOBAL);
+ assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);
assert(base->reg.size == 8);
if (ptr)
base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
assert(base->reg.size == 8);
atom->setIndirect(0, 0, base);
+ atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
return true;
}
base =
@@ -1963,7 +1964,7 @@ NVC0LoweringPass::visit(Instruction *i)
} else if (i->src(0)...
2014 Sep 26
0
[PATCH] gm107/ir: take relative pfetch offset into account
...OP_SHR , TYPE_U32, tmp1, tmp0, bld.mkImm(16));
bld.mkOp2(OP_AND , TYPE_U32, tmp0, tmp0, bld.mkImm(0xff));
bld.mkOp2(OP_AND , TYPE_U32, tmp1, tmp1, bld.mkImm(0xff));
- bld.mkOp1(OP_MOV , TYPE_U32, tmp2, bld.mkImm(i->getSrc(0)->reg.data.u32));
+ if (i->getSrc(1))
+ bld.mkOp2(OP_ADD , TYPE_U32, tmp2, i->getSrc(0), i->getSrc(1));
+ else
+ bld.mkOp1(OP_MOV , TYPE_U32, tmp2, i->getSrc(0));
bld.mkOp3(OP_MAD , TYPE_U32, tmp0, tmp0, tmp1, tmp2);
i->setSrc(0, tmp0);
i->setSrc(1, NULL);
--
1.8.5.5
2015 Jan 04
0
[PATCH] nv50/ir: Add sat modifier for mul
..._nv50.cpp
index 3694209..c13c565 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -84,7 +84,7 @@ static const struct opProperties _initProps[] =
// neg abs not sat c[] s[], a[], imm
{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_SUB, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
- { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
+ { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MIN,...
2015 Mar 25
0
[PATCH] nv50/ir: take postFactor into account when doing peephole optimizations
...tSrc(1, NULL);
} else
- if (imm0.isInteger(2) || imm0.isInteger(-2)) {
+ if (!i->postFactor && (imm0.isInteger(2) || imm0.isInteger(-2))) {
if (imm0.isNegative())
i->src(t).mod = i->src(t).mod ^ Modifier(NV50_IR_MOD_NEG);
i->op = OP_ADD;
--
2.0.5
2014 May 13
1
[PATCH 1/2] nv50/ir: make sure that texprep/texquerylod's args get coalesced
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: "10.2" <mesa-stable at lists.freedesktop.org>
---
Not 100% sure of the significance of this code, but this seems like the
correct thing to do... will definitely run it through a full piglit run before
pushing out.
src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp | 2 ++
1 file changed, 2 insertions(+)
diff --git
2014 Nov 23
3
[Bug 86618] New: [NV96] neg modifiers not working in MIN and MAX operations
...Only difference is lack of neg modifier.
After disabling modifiers shader works as expected:
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -85,8 +85,8 @@ static const struct opProperties _initProps[] =
{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_SUB, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
{ OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
- { OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
- { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
+ { OP_MAX,...
2016 Apr 08
2
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...() == FILE_MEMORY_GLOBAL);
>> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
>> base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);
>> assert(base->reg.size == 8);
>> if (ptr)
>> base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
>> assert(base->reg.size == 8);
>> atom->setIndirect(0, 0, base);
>> + atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
>> return true;
>> }
>> base =
>> @@ -1963,7 +1964,7 @@ NV...
2016 Mar 23
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...m->src(0).getFile() == FILE_MEMORY_GLOBAL);
> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
> base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);
> assert(base->reg.size == 8);
> if (ptr)
> base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
> assert(base->reg.size == 8);
> atom->setIndirect(0, 0, base);
> + atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
> return true;
> }
> base =
> @@ -1963,7 +1964,7 @@ NVC0LoweringPass::visit(Instru...
2016 Apr 12
2
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...gt; + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
>>>> base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);
>>>> assert(base->reg.size == 8);
>>>> if (ptr)
>>>> base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
>>>> assert(base->reg.size == 8);
>>>> atom->setIndirect(0, 0, base);
>>>> + atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
>>>> return true;
>>>> }
>>>&g...
2016 Apr 08
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...OBAL);
>>> + assert(atom->src(0).getFile() == FILE_MEMORY_BUFFER);
>>> base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex * 16);
>>> assert(base->reg.size == 8);
>>> if (ptr)
>>> base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
>>> assert(base->reg.size == 8);
>>> atom->setIndirect(0, 0, base);
>>> + atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
>>> return true;
>>> }
>>> base =
>>&...
2015 Feb 20
10
[PATCH 01/11] nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmax
...*i)
else
if (!isFloatType(i->dType))
op |= isSignedType(i->dType) ? 0x23 : 0x03;
+ if (i->dType == TYPE_F64)
+ op |= 0x01;
emitForm_A(i, op);
emitNegAbs12(i);
@@ -2242,20 +2296,26 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn)
break;
case OP_ADD:
case OP_SUB:
- if (isFloatType(insn->dType))
+ if (insn->dType == TYPE_F64)
+ emitDADD(insn);
+ else if (isFloatType(insn->dType))
emitFADD(insn);
else
emitUADD(insn);
break;
case OP_MUL:
- if (isFloatType(insn->dTyp...
2016 Apr 14
0
[PATCH mesa v2 1/2] nouveau: codegen: Use FILE_MEMORY_BUFFER for buffers
...File() == FILE_MEMORY_BUFFER);
>>>>> base = loadResInfo64(ind, atom->getSrc(0)->reg.fileIndex *
>>>>> 16);
>>>>> assert(base->reg.size == 8);
>>>>> if (ptr)
>>>>> base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
>>>>> assert(base->reg.size == 8);
>>>>> atom->setIndirect(0, 0, base);
>>>>> + atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
>>>>> return true;
>>>>>...
2014 Jan 13
20
[PATCH 00/19] nv50: add sampler2DMS/GP support to get OpenGL 3.2
OK, so there's a bunch of stuff in here. The geometry stuff is based on the
work started by Bryan Cain and Christoph Bumiller.
Patches 01-12: Add support for geometry shaders and fix related issues
Patches 13-14: Make it possible for fb clears to operate on texture attachments
with an explicit layer set (as is allowed in gl 3.2).
Patches 15-17: Make ARB_texture_multisample work
2019 Oct 14
1
[PATCH] gm107/ir: fix loading z offset for layered 3d image bindings
...ass::loadSuInfo32(Value *ptr, int slot, uint32_t off, bool bindless
{
uint32_t base = slot * NVC0_SU_INFO__STRIDE;
+ // We don't upload surface info for bindless for GM107+
+ assert(!bindless || targ->getChipset() < NVISA_GM107_CHIPSET);
+
if (ptr) {
ptr = bld.mkOp2v(OP_ADD, TYPE_U32, bld.getSSA(), ptr, bld.mkImm(slot));
if (bindless)
@@ -2204,7 +2207,7 @@ getDestType(const ImgType type) {
}
void
-NVC0LoweringPass::convertSurfaceFormat(TexInstruction *su)
+NVC0LoweringPass::convertSurfaceFormat(TexInstruction *su, Instruction **loaded)
{
const TexInstr...
2016 Mar 16
2
[PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
...E_U32, bld.getScratch(), bld.mkSysVal(sv,
> 0));
>
> atom->setSrc(0, cloneShallow(func, atom->getSrc(0)));
> - atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
> + atom->getSrc(0)->reg.file = FILE_MEMORY_BUFFER;
> if (ptr)
> base = bld.mkOp2v(OP_ADD, TYPE_U32, base, base, ptr);
> atom->setIndirect(0, 1, NULL);
> @@ -1571,7 +1571,7 @@ NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction
> *su)
> Instruction *red = bld.mkOp(OP_ATOM, su->dType, su->getDef(0));
> red->subOp = su->subOp;
> i...
2016 Mar 16
0
[PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
...m)
bld.mkOp1v(OP_RDSV, TYPE_U32, bld.getScratch(), bld.mkSysVal(sv, 0));
atom->setSrc(0, cloneShallow(func, atom->getSrc(0)));
- atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
+ atom->getSrc(0)->reg.file = FILE_MEMORY_BUFFER;
if (ptr)
base = bld.mkOp2v(OP_ADD, TYPE_U32, base, base, ptr);
atom->setIndirect(0, 1, NULL);
@@ -1571,7 +1571,7 @@ NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction *su)
Instruction *red = bld.mkOp(OP_ATOM, su->dType, su->getDef(0));
red->subOp = su->subOp;
if (!gMemBase)
- gMemBa...
2016 Mar 16
0
[PATCH mesa 4/6] nouveau: codegen: s/FILE_MEMORY_GLOBAL/FILE_MEMORY_BUFFER/
...SysVal(sv,
>> 0));
>>
>> atom->setSrc(0, cloneShallow(func, atom->getSrc(0)));
>> - atom->getSrc(0)->reg.file = FILE_MEMORY_GLOBAL;
>> + atom->getSrc(0)->reg.file = FILE_MEMORY_BUFFER;
>> if (ptr)
>> base = bld.mkOp2v(OP_ADD, TYPE_U32, base, base, ptr);
>> atom->setIndirect(0, 1, NULL);
>> @@ -1571,7 +1571,7 @@ NVC0LoweringPass::handleSurfaceOpNVE4(TexInstruction
>> *su)
>> Instruction *red = bld.mkOp(OP_ATOM, su->dType, su->getDef(0));
>> red->subOp = su-&...