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...functions so the "device functions" usually just disappear. This makes sense for SIMT and also when you do vectorization across WIs of a WG, or in general want to improve the DLP/ILP of the kernel. That said, you might not want to fully inline with all targets (e.g. with a CPU with SIMD + OoOE you might want to reduce the icache footprint and not inline). Therefore, the kernel functions in this sense are different from the device functions and at least the metadata that marks the kernels is still needed. In pocl the OpenCL compilation is now enabled for all (CPU) targets supported by L...

...ot;device functions" usually just disappear. > This makes sense for SIMT and also when you do vectorization across > WIs of a WG, or in general want to improve the DLP/ILP of the kernel. > That said, you might not want to fully inline with all targets > (e.g. with a CPU with SIMD + OoOE you might want to reduce the icache > footprint and not inline). > > Therefore, the kernel functions in this sense are different from the > device functions and at least the metadata that marks the kernels is > still needed. In pocl the OpenCL compilation is now enabled for all >...

On Tue, Dec 13, 2011 at 3:37 PM, Villmow, Micah <Micah.Villmow at amd.com>wrote: > ** ** > > *From:* Justin Holewinski [mailto:justin.holewinski at gmail.com] > *Sent:* Tuesday, December 13, 2011 10:50 AM > > *To:* Villmow, Micah > *Cc:* LLVM Developers Mailing List > *Subject:* Re: [LLVMdev] Changes to the PTX calling conventions**** > > ** ** > > On

From: Justin Holewinski [mailto:justin.holewinski at gmail.com] Sent: Tuesday, December 13, 2011 10:50 AM To: Villmow, Micah Cc: LLVM Developers Mailing List Subject: Re: [LLVMdev] Changes to the PTX calling conventions On Tue, Dec 13, 2011 at 12:54 PM, Villmow, Micah <Micah.Villmow at amd.com<mailto:Micah.Villmow at amd.com>> wrote: From: Justin Holewinski [mailto:justin.holewinski