search for: nxv4i64

...same scheme for SVE but also incorporate the implicit (VL x) to distinguish from existing vector types. Hence we are proposing each vector MVT have a scalable vector MVT equivalent. MVT::v2i32 -> MVT::nxv2i32 MVT::v2i64 -> MVT::nxv2i64 MVT::v4i32 -> MVT::nxv4i32 MVT::v4i64 -> MVT::nxv4i64 ....likewise for all <#Elements> and <ElementType> combinations The resulting SVE instruction selection is... (1) Pat<(nxv2i64 (add (nxv2i64 $zn), (nxv2i64 $zm))), ADD_D_ZZZ // New SVE pattern (2) Pat<(nxv4i32 (add (nxv4i32 $zn), (nxv4i32 $zm))), ADD_S_ZZZ // New SVE pattern...

...ning to become implicitly multiplied by `n` to match its main usage. The change has no effect when applied to non-scalable vectors, because `n == 1`. No target specific code is affected and in many cases common code becomes compatible with scalable vectors. For example: `nxv2i64 extract_subvector(nxv4i64, 2)` The real first lane becomes `n * 2`, resulting in the extraction of the top half of the input vector. This maintains the intension of the original code for both scalable and non-scalable vectors. For common code that truly requires an absolute index we recommend a new distinct ISD node to be...