search for: nvkm_device_tegra_func

...370cb56e3c 100644 --- a/drm/nouveau/include/nvkm/core/tegra.h +++ b/drm/nouveau/include/nvkm/core/tegra.h @@ -11,6 +11,7 @@ struct nvkm_device_tegra { struct reset_control *rst; struct clk *clk; + struct clk *clk_ref; struct clk *clk_pwr; struct regulator *vdd; @@ -36,6 +37,10 @@ struct nvkm_device_tegra_func { * bypassed). A value of 0 means an IOMMU is never used. */ u8 iommu_bit; + /* + * Whether the chip requires a reference clock + */ + bool require_ref_clk; }; int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *, diff --git a/drm/nouveau/nouveau_platform.c b/drm/nouveau/no...

...sertions(+) diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index 2b2baf6e0e0d..d2928d43f29a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -1171,10 +1171,16 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, goto err_free; } + err = nouveau_drm_device_init(drm); + if (err) + goto err_put; + platform_set_drvdata(pdev, drm); return drm; +err_put: + drm_dev_put(drm); err_free: nvkm_device_del(pdevice); -- 2.19.1

...ice_remove(struct drm_device *dev) > device = nvkm_device_find(client->device); > > nouveau_drm_device_fini(dev); > - drm_dev_put(dev); > nvkm_device_del(&device); > } > > @@ -1285,7 +1279,8 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, > struct platform_device *pdev, > struct nvkm_device **pdevice) > { > - struct drm_device *drm; > + struct nouveau_drm *nv_dev; > + struct drm_device *drm_dev; > int err; > >...

...nouveau_platform.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drm/nouveau/nouveau_platform.c b/drm/nouveau/nouveau_platform.c index 49d9ba0e3c51..1ada186fab77 100644 --- a/drm/nouveau/nouveau_platform.c +++ b/drm/nouveau/nouveau_platform.c @@ -62,6 +62,12 @@ static const struct nvkm_device_tegra_func gm20b_platform_data = { .require_ref_clk = true, }; +static const struct nvkm_device_tegra_func gp10b_platform_data = { + .iommu_bit = 36, + /* power provided by generic PM domains */ + .require_vdd = false, +}; + static const struct of_device_id nouveau_platform_match[] = { { .compatibl...

...p;device); return ret; @@ -799,7 +794,6 @@ nouveau_drm_device_remove(struct drm_device *dev) device = nvkm_device_find(client->device); nouveau_drm_device_fini(dev); - drm_dev_put(dev); nvkm_device_del(&device); } @@ -1285,7 +1279,8 @@ nouveau_platform_device_create(const struct nvkm_device_tegra_func *func, struct platform_device *pdev, struct nvkm_device **pdevice) { - struct drm_device *drm; + struct nouveau_drm *nv_dev; + struct drm_device *drm_dev; int err; err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, @@ -1293,22 +1288,21 @@ nouveau_pla...

...nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h > index 3666a7403e47..aa936cabb6cf 100644 > --- a/drivers/gpu/drm/nouveau/nouveau_drv.h > +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h > @@ -327,6 +327,7 @@ struct drm_device * > nouveau_platform_device_create(const struct nvkm_device_tegra_func *, > struct platform_device *, struct nvkm_device **); > void nouveau_drm_device_remove(struct drm_device *dev); > +void nouveau_drm_device_shutdown(struct drm_device *dev); > > #define NV_PRINTK(l,c,f,a...) do { \ > str...

...source_size, + .cpu_coherent = !IS_ENABLED(CONFIG_ARM), }; int diff --git a/drm/nouveau/nvkm/engine/device/tegra.c b/drm/nouveau/nvkm/engine/device/tegra.c index 939682f..9b638bd 100644 --- a/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drm/nouveau/nvkm/engine/device/tegra.c @@ -245,6 +245,7 @@ nvkm_device_tegra_func = { .fini = nvkm_device_tegra_fini, .resource_addr = nvkm_device_tegra_resource_addr, .resource_size = nvkm_device_tegra_resource_size, + .cpu_coherent = false, }; int diff --git a/lib/include/nvif/os.h b/lib/include/nvif/os.h index b45a186..2f34c5a 100644 --- a/lib/include/nvif/os.h +++...

This patch series came about after a _long_ discussion between me and Maxime Ripard in response to a different patch I sent out [1]. As part of that discussion, we realized that it would be good if DRM drivers consistently called drm_atomic_helper_shutdown() properly at shutdown and driver remove time as it's documented that they should do. The eventual goal of this would be to enable removing

...ed, 9 insertions(+) diff --git a/drm/nouveau/nvkm/engine/device/tegra.c b/drm/nouveau/nvkm/engine/device/tegra.c index 6d89416f0bc1..e1cd665aee2c 100644 --- a/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drm/nouveau/nvkm/engine/device/tegra.c @@ -272,6 +272,15 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func, if (IS_ERR(tdev->clk_pwr)) return PTR_ERR(tdev->clk_pwr); + /** + * The IOMMU bit defines the upper limit of the GPU-addressable space. + * This will be refined in nouveau_ttm_init but we need to do it early + * for instmem to behave properly + */ + ret = dma_set_mask(&p...

.../nouveau/nvkm/engine/device/tegra.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c index 189ed80e21ffb..ac5d4cf058c25 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/tegra.c @@ -282,7 +282,7 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func, } } - tdev->rst = devm_reset_control_get(&pdev->dev, "gpu"); + tdev->rst = devm_reset_control_get_exclusive(&pdev->dev, "gpu"); if (IS_ERR(tdev->rst)) { ret = PTR_ERR(tdev->rst); goto free; -- 2.11.0

Am Montag, den 25.01.2016, 18:44 +0900 schrieb Alexandre Courbot: > nvkm_device_tegra_new initializes the irq member of the Tegra device > to -1 in order to signal that it is uninitialized. However, > nvkm_device_tegra_fini tests it against 0 to check whether an IRQ has > been allocated or not. This leads to free_irq being called on -1 > during > device initialization. > The

...BLED(CONFIG_ARM), > }; > > int > diff --git a/drm/nouveau/nvkm/engine/device/tegra.c b/drm/nouveau/nvkm/engine/device/tegra.c > index 939682f..9b638bd 100644 > --- a/drm/nouveau/nvkm/engine/device/tegra.c > +++ b/drm/nouveau/nvkm/engine/device/tegra.c > @@ -245,6 +245,7 @@ nvkm_device_tegra_func = { > .fini = nvkm_device_tegra_fini, > .resource_addr = nvkm_device_tegra_resource_addr, > .resource_size = nvkm_device_tegra_resource_size, > + .cpu_coherent = false, > }; > > int > diff --git a/lib/include/nvif/os.h b/lib/include/nvif/os.h...

Reduces object size ~4kb Joe Perches (2): drm/nouveau: Add new logging function nv_cli_printk drm/nouveau: Convert NV_PRINTK macros and uses to new nv_cli_<level> macros drivers/gpu/drm/nouveau/nouveau_abi16.c | 2 +- drivers/gpu/drm/nouveau/nouveau_chan.c | 12 +++---- drivers/gpu/drm/nouveau/nouveau_drm.c | 21 +++++++++++ drivers/gpu/drm/nouveau/nouveau_drv.h | 44

GP10B is the chip used in Tegra X2 SoCs. This patchset adds support for its base engines after reworking secboot a bit to accomodate its calling convention better. This patchset has been tested rendering simple off-screen buffers using Mesa and yielded the expected result. Alexandre Courbot (15): secboot: allow to boot multiple falcons secboot: pass instance to LS firmware loaders secboot:

TTM-allocated coherent objects were populated using the DMA API and accessed using the mapping it returned to workaround coherency issues. These issues seem to have been solved, thus remove this extra case to handle and use the regular kernel mapping functions. Signed-off-by: Alexandre Courbot <acourbot at nvidia.com> --- drm/nouveau/nouveau_bo.c | 61

...gt;> >> int >> diff --git a/drm/nouveau/nvkm/engine/device/tegra.c b/drm/nouveau/nvkm/engine/device/tegra.c >> index 939682f..9b638bd 100644 >> --- a/drm/nouveau/nvkm/engine/device/tegra.c >> +++ b/drm/nouveau/nvkm/engine/device/tegra.c >> @@ -245,6 +245,7 @@ nvkm_device_tegra_func = { >> .fini = nvkm_device_tegra_fini, >> .resource_addr = nvkm_device_tegra_resource_addr, >> .resource_size = nvkm_device_tegra_resource_size, >> + .cpu_coherent = false, >> }; >> >> int >> diff --git a/lib/include/nv...

Hi folks, Currently, when the device is removed (or the driver is unbound) the nouveau_drm structure de-allocated. However, it's still accessible from and used by some DRM layer callbacks. For example, file handles can be closed after the device has been removed (physically or otherwise). This series converts the Nouveau device structure to be allocated and de-allocated with the

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi Ben, here's a revised subset of the patches I had sent out a couple of weeks ago. I've reworked the BAR2 accesses in the way that you had suggested, which at least for GP10B turned out to be fairly trivial to do. I have not looked in detail at this for GV11B yet, but a cursory look showed that BAR2 is accessed in more places, so the

From: Thierry Reding <treding at nvidia.com> Hi, the GPU on Jetson TX2 (GP10B) does not work properly on all devices. Why exactly is not clear, but there are slight differences between the SKUs that were tested. It turns out that the biggest issue is that on some devices (e.g. the one that I have), pulsing the GPU reset twice as is done in the current code (once as part of the power-ungate