Displaying 5 results from an estimated 5 matches for "nvisa_gk20a_chipset".
2014 May 27
8
[PATCH 0/2] nvc0: support for GK20A (Tegra K1)
The following 2 patches make it possible to run Mesa programs on GK20A
(Tegra K1).
GK20A is very similar to GK104, but uses a new (backward-compatible) 3D class
as well as the same ISA as GK110 (SM35). Taking these differences into account
is sufficient to successfully render simple off-screen buffers.
Alexandre Courbot (2):
nvc0: add GK20A 3D class
nvc0: use SM35 ISA with GK20A
2014 May 27
1
[PATCH 2/2] nvc0: use SM35 ISA with GK20A
...lium/drivers/nouveau/codegen/nv50_ir_driver.h
> +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
> @@ -91,6 +91,7 @@ struct nv50_ir_prog_symbol
> #define NVISA_GF100_CHIPSET_C0 0xc0
> #define NVISA_GF100_CHIPSET_D0 0xd0
> #define NVISA_GK104_CHIPSET 0xe0
> +#define NVISA_GK20A_CHIPSET 0xea
> #define NVISA_GK110_CHIPSET 0xf0
> #define NVISA_GM107_CHIPSET 0x110
>
> diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
> index b1f76cf80432..f69e6a183e19 100644
> --- a/src/galli...
2014 May 27
0
[PATCH v2 2/2] nvc0: use SM35 ISA with GK20A
...ivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -91,7 +91,7 @@ struct nv50_ir_prog_symbol
#define NVISA_GF100_CHIPSET_C0 0xc0
#define NVISA_GF100_CHIPSET_D0 0xd0
#define NVISA_GK104_CHIPSET 0xe0
-#define NVISA_GK110_CHIPSET 0xf0
+#define NVISA_GK20A_CHIPSET 0xea
#define NVISA_GM107_CHIPSET 0x110
struct nv50_ir_prog_info
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index b1f76cf80432..f69e6a183e19 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit...
2014 May 27
0
[PATCH 2/2] nvc0: use SM35 ISA with GK20A
...857ee7e4f 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_driver.h
@@ -91,6 +91,7 @@ struct nv50_ir_prog_symbol
#define NVISA_GF100_CHIPSET_C0 0xc0
#define NVISA_GF100_CHIPSET_D0 0xd0
#define NVISA_GK104_CHIPSET 0xe0
+#define NVISA_GK20A_CHIPSET 0xea
#define NVISA_GK110_CHIPSET 0xf0
#define NVISA_GM107_CHIPSET 0x110
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
index b1f76cf80432..f69e6a183e19 100644
--- a/src/gallium/drivers/nouveau/codegen/n...
2017 Mar 26
5
[PATCH v5 0/5] nvc0/ir: add support for MAD/FMA PostRALoadPropagation
was "nv50/ir: PostRaConstantFolding improvements" before.
nothing really changed from the last version, just minor things.
Karol Herbst (5):
nv50/ir: restructure and rename postraconstantfolding pass
nv50/ir: implement mad post ra folding for nvc0+
gk110/ir: add LIMM form of mad
gm107/ir: add LIMM form of mad
nv50/ir: also do PostRaLoadPropagation for FMA