search for: nvif_wr32

...nv_plane->iturbt_709) + if (nv_plane->color_encoding == DRM_COLOR_YCBCR_BT709) format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709; if (nv_plane->colorkey & (1 << 24)) format |= NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY; @@ -229,7 +228,7 @@ nv10_set_params(struct nouveau_plane *plane) nvif_wr32(dev, NV_PVIDEO_COLOR_KEY, plane->colorkey & 0xffffff); if (plane->cur) { - if (plane->iturbt_709) + if (plane->color_encoding == DRM_COLOR_YCBCR_BT709) format |= NV_PVIDEO_FORMAT_MATRIX_ITURBT709; if (plane->colorkey & (1 << 24)) format |= NV_PVIDEO_FOR...

This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB8888 mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only

This was all kicked off by me figuring out how the PPC byteswap thing worked. In the end, we're keeping the implicit byteswap based on architecture, but also expose the correctly supported formats, and fix some overlay details. Overlay framebuffers have various funky requirements that should be enforced at framebuffer creation time (these are set apart by their YUV formats). Further, I

This came out of some debugging I was doing to figure out how BE mode works on this hardware. Among other things, it came out that we're not exposing 16-bpp mode support and that the ARGB8888 mode that we do expose is broken. Also the overlay logic was pretty broken, I must have only tested with very "normal" overlay buffer sizes with modetest before. That said, this code has only

...o_pin(nvbo, TTM_PL_FLAG_VRAM, false); if (ret) return ret; - nv_plane->cur = nv_fb->nvbo; + nv_plane->cur = nvbo; nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0); nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0); - nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset); + nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nvbo->bo.offset); nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y <&...

All fields in struct nouveau_framebuffer appear to be obsolete. The data structure can be replaced by struct drm_framebuffer entirely. Patch 1 removes several unused fields from struct nouveau_framebuffer. Patch 2 moves the field vma to struct nouveau_fbdev. The information in vma is only relevant for fbdev emulation, and as such he field is only used there. Patch 3 removes nvbo from struct

...input_clk / freq; + duty = value * div / LED_FULL; + + /* for now, this is safe to directly poke those registers because: + * - A: nvidia never puts the logo led to any other PWM controler + * than PDISPLAY.SOR[1].PWM. + * - B: nouveau does not touch these registers anywhere else + */ + nvif_wr32(device, 0x61c880, div); + nvif_wr32(device, 0x61c884, 0xc0000000 | duty); +} + +int +nouveau_led_init(struct drm_device *dev) +{ + struct nouveau_drm *drm = nouveau_drm(dev); + struct nvkm_gpio *gpio = nvxx_gpio(&drm->device); + struct dcb_gpio_func logo_led; + int ret; + + /* check that the...

...safe to directly poke those registers because: >> + * - A: nvidia never puts the logo led to any other PWM controler >> + * than PDISPLAY.SOR[1].PWM. >> + * - B: nouveau does not touch these registers anywhere else >> + */ >> + nvif_wr32(device, 0x61c880, div); >> + nvif_wr32(device, 0x61c884, 0xc0000000 | duty); > I feel like there should be a comment explaining the 0x40000000 > (connected to crystal). Or maybe we should be in general more strict > about using constants, I feel like those hardcoded magic numbe...

Signed-off-by: Maarten Lankhorst <maarten.lankhorst at ubuntu.com> --- diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 3ed12a8cfc91..a4a586807903 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c @@ -370,6 +370,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper, ret = -ENOMEM; goto

...pin(nv_bo, TTM_PL_FLAG_VRAM, false); if (ret) return ret; - nv_plane->cur = nv_fb->nvbo; + nv_plane->cur = nv_bo; nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0); nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0); - nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset); + nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_bo->bo.offset); nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y <...

...pin(nv_bo, TTM_PL_FLAG_VRAM, false); if (ret) return ret; - nv_plane->cur = nv_fb->nvbo; + nv_plane->cur = nv_bo; nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0); nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0); - nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset); + nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_bo->bo.offset); nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y <...

...pin(nv_bo, TTM_PL_FLAG_VRAM, false); if (ret) return ret; - nv_plane->cur = nv_fb->nvbo; + nv_plane->cur = nv_bo; nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff2, NV_CRTC_FSEL_OVERLAY, 0); nvif_wr32(dev, NV_PVIDEO_BASE(flip), 0); - nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_fb->nvbo->bo.offset); + nvif_wr32(dev, NV_PVIDEO_OFFSET_BUFF(flip), nv_bo->bo.offset); nvif_wr32(dev, NV_PVIDEO_SIZE_IN(flip), src_h << 16 | src_w); nvif_wr32(dev, NV_PVIDEO_POINT_IN(flip), src_y <...

...input_clk / freq; + duty = value * div / LED_FULL; + + /* for now, this is safe to directly poke those registers because: + * - A: nvidia never puts the logo led to any other PWM controler + * than PDISPLAY.SOR[1].PWM. + * - B: nouveau does not touch these registers anywhere else + */ + nvif_wr32(device, 0x61c880, div); + nvif_wr32(device, 0x61c884, 0xc0000000 | duty); +} +#endif + +int +nouveau_led_init(struct drm_device *dev) +{ +#ifdef CONFIG_LEDS_CLASS + struct nouveau_drm *drm = nouveau_drm(dev); + struct nvkm_gpio *gpio = nvxx_gpio(&drm->device); + struct dcb_gpio_func logo_led...

https://bugs.freedesktop.org/show_bug.cgi?id=31122 Summary: Cannot control backlight intensity on Powerbook Product: xorg Version: unspecified Platform: PowerPC OS/Version: Linux (All) Status: NEW Severity: enhancement Priority: medium Component: Driver/nouveau AssignedTo: nouveau at

.../* for now, this is safe to directly poke those registers because: > + * - A: nvidia never puts the logo led to any other PWM controler > + * than PDISPLAY.SOR[1].PWM. > + * - B: nouveau does not touch these registers anywhere else > + */ > + nvif_wr32(device, 0x61c880, div); Isn't the location of PDISP.SOR[1] different for different gens? e.g. the nv50 disp vs the nvd0 disp vs others (I don't remember the exact details). > + nvif_wr32(device, 0x61c884, 0xc0000000 | duty); > +} > + > +int > +nouveau_led_init(struct...

.../* for now, this is safe to directly poke those registers because: > + * - A: nvidia never puts the logo led to any other PWM controler > + * than PDISPLAY.SOR[1].PWM. > + * - B: nouveau does not touch these registers anywhere else > + */ > + nvif_wr32(device, 0x61c880, div); > + nvif_wr32(device, 0x61c884, 0xc0000000 | duty); I feel like there should be a comment explaining the 0x40000000 (connected to crystal). Or maybe we should be in general more strict about using constants, I feel like those hardcoded magic numbers are hard to und...

.../* for now, this is safe to directly poke those registers because: > + * - A: nvidia never puts the logo led to any other PWM controler > + * than PDISPLAY.SOR[1].PWM. > + * - B: nouveau does not touch these registers anywhere else > + */ > + nvif_wr32(device, 0x61c880, div); > + nvif_wr32(device, 0x61c884, 0xc0000000 | duty); > +} > + > +int > +nouveau_led_init(struct drm_device *dev) > +{ > + struct nouveau_drm *drm = nouveau_drm(dev); > + struct nvkm_gpio *gpio = nvxx_gpio(&drm->device); > +...

..._wait(void *evoc, int nr) 414: { 415: struct nv50_dmac *dmac = evoc; 416: u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4; 417: 418: mutex_lock(&dmac->lock); 419: if (put + nr >= (PAGE_SIZE / 4) - 8) { 420: dmac->ptr[put] = 0x20000000; 421: 422: nvif_wr32(&dmac->base.user, 0x0000, 0x00000000); 423: if (!nvxx_wait(&dmac->base.user, 0x0004, ~0, 0x00000000)) { 424: mutex_unlock(&dmac->lock); 425: nv_error(nvxx_object(&dmac->base.user), "channel stalled\n"); 426: return NU...

Next version of https://patchwork.freedesktop.org/series/48596/ . Made some important changes to the refactoring patch, but everything else is the same. Lyude Paul (5): drm/nouveau: Check backlight IDs are >= 0, not > 0 drm/nouveau: Move backlight device into nouveau_connector drm/nouveau: s/nouveau_backlight_exit/nouveau_backlight_fini/ drm/nouveau: Cleanup indenting in

This series fixes some issues with nouveau's backlight support that were causing kernel panics on module reloads, specifically on systems with nouveau handling the backlight of one of the displays. While we're at it, let's cleanup nouveau_backlight.c as well Lyude Paul (5): drm/nouveau: Check backlight IDs are >= 0, not > 0 drm/nouveau: Move backlight device into