Displaying 13 results from an estimated 13 matches for "nvc0_m2mf".
2015 Oct 10
3
[PATCH] nv50, nvc0: don't base decisions on available pushbuf space
..., bo->offset + base);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
index aaec60a..d459dd6 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
@@ -188,14 +188,10 @@ nvc0_m2mf_push_linear(struct nouveau_context *nv,
nouveau_pushbuf_validate(push);
while (count) {
- unsigned nr;
+ unsigned nr = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
- if (!PUSH_SPACE(push, 16))
+ if (!PUSH_SPACE(push, nr + 9))
break;
- nr = PUSH_AVAIL(push);...
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
..._DATA (push, 0x88888888);
> + }
> }
>
> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
> index 607e97b..959f67f 100644
> --- a/src/nvc0_accel.h
> +++ b/src/nvc0_accel.h
> @@ -7,6 +7,7 @@
> #include "hwdefs/nvc0_m2mf.xml.h"
> #include "hwdefs/nv50_defs.xml.h"
> #include "hwdefs/nv50_texture.h"
> +#include "hwdefs/gm107_texture.xml.h"
> #include "hwdefs/nv_3ddefs.xml.h"
>
> /* subchannel assignments, compatible with kepler's fixed layout */...
2015 Oct 10
2
[PATCH] nv50, nvc0: don't base decisions on available pushbuf space
...lium/drivers/nouveau/nvc0/nvc0_transfer.c
>> b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
>> index aaec60a..d459dd6 100644
>> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
>> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_transfer.c
>> @@ -188,14 +188,10 @@ nvc0_m2mf_push_linear(struct nouveau_context *nv,
>> nouveau_pushbuf_validate(push);
>> while (count) {
>> - unsigned nr;
>> + unsigned nr = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
>> - if (!PUSH_SPACE(push, 16))
>> + if (!PUSH_SPACE(push,...
2016 Oct 16
0
[PATCH 2/5] nvc0: make use of the new hwdefs for TEX_CB_INDEX
...+12,7 @@
/* subchannel assignments, compatible with kepler's fixed layout */
#define SUBC_3D(mthd) 0, (mthd)
#define NVC0_3D(mthd) SUBC_3D(NVC0_3D_##mthd)
+#define NVE4_3D(mthd) SUBC_3D(NVE4_3D_##mthd)
#define SUBC_M2MF(mthd) 2, (mthd)
#define SUBC_P2MF(mthd) 2, (mthd)
#define NVC0_M2MF(mthd) SUBC_M2MF(NVC0_M2MF_##mthd)
--
2.7.3
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
..._DATA (push, 0x88888888);
> + }
> }
>
> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
> index 607e97b..9378236 100644
> --- a/src/nvc0_accel.h
> +++ b/src/nvc0_accel.h
> @@ -7,6 +7,7 @@
> #include "hwdefs/nvc0_m2mf.xml.h"
> #include "hwdefs/nv50_defs.xml.h"
> #include "hwdefs/nv50_texture.h"
> +#include "hwdefs/gm107_texture.xml.h"
> #include "hwdefs/nv_3ddefs.xml.h"
>
> /* subchannel assignments, compatible with kepler's fixed layout */...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...}
>>
>> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
>> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
>> index 607e97b..959f67f 100644
>> --- a/src/nvc0_accel.h
>> +++ b/src/nvc0_accel.h
>> @@ -7,6 +7,7 @@
>> #include "hwdefs/nvc0_m2mf.xml.h"
>> #include "hwdefs/nv50_defs.xml.h"
>> #include "hwdefs/nv50_texture.h"
>> +#include "hwdefs/gm107_texture.xml.h"
>> #include "hwdefs/nv_3ddefs.xml.h"
>>
>> /* subchannel assignments, compatible with kepler...
2014 Dec 31
0
[PATCH 2/2] nvc0: regenerate rnndb headers
...src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h | 1115 ++++++++++++++++----
src/gallium/drivers/nouveau/nvc0/nvc0_3ddefs.xml.h | 98 --
.../drivers/nouveau/nvc0/nvc0_compute.xml.h | 67 +-
src/gallium/drivers/nouveau/nvc0/nvc0_context.h | 5 +-
src/gallium/drivers/nouveau/nvc0/nvc0_m2mf.xml.h | 67 +-
src/gallium/drivers/nouveau/nvc0/nvc0_macros.h | 32 +
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 6 +-
src/gallium/drivers/nouveau/nvc0/nvc0_state.c | 6 +-
src/gallium/drivers/nouveau/nvc0/nvc0_surface.c | 22 +-
src/gallium/drivers/nouveau/nvc0/...
2016 Oct 16
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...888);
+ PUSH_DATA (push, 0x88888888);
+ PUSH_DATA (push, 0x88888888);
+ }
}
BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
index 607e97b..9378236 100644
--- a/src/nvc0_accel.h
+++ b/src/nvc0_accel.h
@@ -7,6 +7,7 @@
#include "hwdefs/nvc0_m2mf.xml.h"
#include "hwdefs/nv50_defs.xml.h"
#include "hwdefs/nv50_texture.h"
+#include "hwdefs/gm107_texture.xml.h"
#include "hwdefs/nv_3ddefs.xml.h"
/* subchannel assignments, compatible with kepler's fixed layout */
@@ -108,4 +109,59 @@ PUSH_DA...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...888);
+ PUSH_DATA (push, 0x88888888);
+ PUSH_DATA (push, 0x88888888);
+ }
}
BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
index 607e97b..959f67f 100644
--- a/src/nvc0_accel.h
+++ b/src/nvc0_accel.h
@@ -7,6 +7,7 @@
#include "hwdefs/nvc0_m2mf.xml.h"
#include "hwdefs/nv50_defs.xml.h"
#include "hwdefs/nv50_texture.h"
+#include "hwdefs/gm107_texture.xml.h"
#include "hwdefs/nv_3ddefs.xml.h"
/* subchannel assignments, compatible with kepler's fixed layout */
@@ -108,4 +109,59 @@ PUSH_DA...
2016 Oct 17
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...}
>>
>> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
>> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
>> index 607e97b..9378236 100644
>> --- a/src/nvc0_accel.h
>> +++ b/src/nvc0_accel.h
>> @@ -7,6 +7,7 @@
>> #include "hwdefs/nvc0_m2mf.xml.h"
>> #include "hwdefs/nv50_defs.xml.h"
>> #include "hwdefs/nv50_texture.h"
>> +#include "hwdefs/gm107_texture.xml.h"
>> #include "hwdefs/nv_3ddefs.xml.h"
>>
>> /* subchannel assignments, compatible with kepler...
2014 Dec 31
2
[PATCH 1/2] nv50: regenerate rnndb headers
The headers hadn't been regenerated in a long time, and there were a few
minor divergences. Among other things, rnndb has changed naming to
G80/etc, for now I've not tackled switching that over and manually
replaced the nvidia codenames back to the chip ids. However no other
modifications of the headergen'd headers was done.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
...db/nvchipsets.xml ( 3617 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv_defs.xml ( 4437 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv50_defs.xml ( 5468 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nvc0_m2mf.xml ( 2687 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv01_2d.xml ( 32584 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv04_dvd.xml ( 3000 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv03_3d.xml...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update