Displaying 16 results from an estimated 16 matches for "nvc0_exa".
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...dated format, which is what I tested
> with. However GM20x and GP10x also use this TIC format.
>
> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
> ---
> src/nvc0_accel.c | 11 ++++++++++
> src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
> src/nvc0_exa.c | 23 ++++---------------
> src/nvc0_xv.c | 67 +++++++++++++++++++-------------------------------------
> 4 files changed, 93 insertions(+), 64 deletions(-)
>
> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
> index 0682806..8da5051 100644
> --- a/src/nvc0_accel.c
> +...
2016 Oct 17
1
[PATCH] exa: add GM10x acceleration support
On Mon, Oct 17, 2016 at 5:28 AM, Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
> Looks reasonable, some minor comments below.
>
>
> On 10/16/2016 02:06 AM, Ilia Mirkin wrote:
>> diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
>> index 6add60b..a53dfe6 100644
>> --- a/src/nvc0_exa.c
>> +++ b/src/nvc0_exa.c
>> @@ -914,14 +914,56 @@ NVC0EXAComposite(PixmapPtr pdpix,
>> if (!PUSH_SPACE(push, 64))
>> return;
>>
>> + if (pNv->d...
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...dated format, which is what I tested
> with. However GM20x and GP10x also use this TIC format.
>
> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
> ---
> src/nvc0_accel.c | 11 ++++++++++
> src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
> src/nvc0_exa.c | 22 ++++---------------
> src/nvc0_xv.c | 67 +++++++++++++++++++-------------------------------------
> 4 files changed, 93 insertions(+), 63 deletions(-)
>
> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
> index 0682806..8da5051 100644
> --- a/src/nvc0_accel.c
> +...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...I tested
>> with. However GM20x and GP10x also use this TIC format.
>>
>> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
>> ---
>> src/nvc0_accel.c | 11 ++++++++++
>> src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
>> src/nvc0_exa.c | 23 ++++---------------
>> src/nvc0_xv.c | 67
>> +++++++++++++++++++-------------------------------------
>> 4 files changed, 93 insertions(+), 64 deletions(-)
>>
>> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
>> index 0682806..8da5051 100644
>&...
2015 Mar 14
1
[PATCH ddx] Add support for VRAM-less devices to the ddx
...celInit3D_NVC0(ScrnInfoPtr pScrn)
if (nouveau_pushbuf_space(push, 512, 0, 0) ||
nouveau_pushbuf_refn (push, &(struct nouveau_pushbuf_refn) {
- pNv->scratch, NOUVEAU_BO_VRAM |
+ pNv->scratch, NOUVEAU_BO_APER |
NOUVEAU_BO_WR }, 1))
return FALSE;
diff --git a/src/nvc0_exa.c b/src/nvc0_exa.c
index 1f33353..596361e 100644
--- a/src/nvc0_exa.c
+++ b/src/nvc0_exa.c
@@ -96,11 +96,10 @@ NVC0EXAAcquireSurface2D(PixmapPtr ppix, int is_src, uint32_t fmt)
{
NVC0EXA_LOCALS(ppix);
struct nouveau_bo *bo = nouveau_pixmap_bo(ppix);
- struct nouveau_pixmap *nvpix = nouveau_pix...
2016 Oct 16
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
This flips GM10x to using the updated format, which is what I tested
with. However GM20x and GP10x also use this TIC format.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/nvc0_accel.c | 11 ++++++++++
src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
src/nvc0_exa.c | 22 ++++---------------
src/nvc0_xv.c | 67 +++++++++++++++++++-------------------------------------
4 files changed, 93 insertions(+), 63 deletions(-)
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index 0682806..8da5051 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -322,6 +3...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
This flips GM10x to using the updated format, which is what I tested
with. However GM20x and GP10x also use this TIC format.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/nvc0_accel.c | 11 ++++++++++
src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
src/nvc0_exa.c | 23 ++++---------------
src/nvc0_xv.c | 67 +++++++++++++++++++-------------------------------------
4 files changed, 93 insertions(+), 64 deletions(-)
diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
index 0682806..8da5051 100644
--- a/src/nvc0_accel.c
+++ b/src/nvc0_accel.c
@@ -322,6 +3...
2016 Oct 17
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...I tested
>> with. However GM20x and GP10x also use this TIC format.
>>
>> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
>> ---
>> src/nvc0_accel.c | 11 ++++++++++
>> src/nvc0_accel.h | 56 ++++++++++++++++++++++++++++++++++++++++++++++
>> src/nvc0_exa.c | 22 ++++---------------
>> src/nvc0_xv.c | 67
>> +++++++++++++++++++-------------------------------------
>> 4 files changed, 93 insertions(+), 63 deletions(-)
>>
>> diff --git a/src/nvc0_accel.c b/src/nvc0_accel.c
>> index 0682806..8da5051 100644
>&...
2015 Mar 21
0
[PATCH] use defined method names where available
...+++----
src/nv30_exa.c | 20 ++++++++++----------
src/nv40_exa.c | 8 ++++----
src/nv50_accel.c | 6 +++---
src/nv50_accel.h | 1 +
src/nv50_exa.c | 8 ++++----
src/nv50_xv.c | 2 +-
src/nv_accel_common.c | 6 +++---
src/nvc0_accel.c | 4 ++--
src/nvc0_exa.c | 2 +-
10 files changed, 33 insertions(+), 32 deletions(-)
diff --git a/src/nv10_exa.c b/src/nv10_exa.c
index 78bc739..7daa281 100644
--- a/src/nv10_exa.c
+++ b/src/nv10_exa.c
@@ -697,9 +697,9 @@ NVAccelInitNV10TCL(ScrnInfoPtr pScrn)
PUSH_DATA (push, 0);
}
- BEGIN_NV04(push, SUBC...
2016 Oct 16
2
[PATCH] exa: add GM10x acceleration support
...step in that direction.
src/Makefile.am | 16 ++++++++
src/nouveau_copy.c | 1 +
src/nouveau_exa.c | 2 +-
src/nouveau_xv.c | 2 +-
src/nv_accel_common.c | 1 +
src/nv_driver.c | 1 +
src/nvc0_accel.c | 37 ++++++++++++++---
src/nvc0_exa.c | 48 ++++++++++++++++++++--
src/nvc0_xv.c | 48 ++++++++++++++++++++--
src/shader/Makefile | 23 ++++++++---
src/shader/exac8nv110.fp | 47 +++++++++++++++++++++
src/shader/exac8nv110.fpc | 38 +++++++++++++++++
src/shader/exacanv110.fp | 47 +++++++++++++++++...
2012 Apr 11
1
[error] xf86-video-nouveau on OpenBSD
...like this :
echo "/usr/X11R6/share/aclocal" >> /usr/local/share/aclocal/dirlist
./configure --enable-nouveau-experimental-api
make
make install
There wasn't any problem.
Then, I try to compile xf86-video-nouveau with :
./configure
make
But I get this error message :
CC nvc0_exa.lo
CC nvc0_xv.lo
CC drmmode_display.lo
drmmode_display.c: In function 'drmmode_page_flip':
drmmode_display.c:1319: warning: implicit declaration of function
'drmModePageFlip'
drmmode_display.c: In function 'drmmode_screen_init':
drmmode_display.c:1476: error: ...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
...3 +
src/nouveau_exa.c | 2 +-
src/nouveau_local.h | 2 +-
src/nouveau_xv.c | 2 +-
src/nv_accel_common.c | 1 +
src/nv_driver.c | 3 +
src/nvc0_accel.c | 68 +++-
src/nvc0_accel.h | 57 +++
src/nvc0_exa.c | 71 ++--
src/nvc0_xv.c | 115 +++---
src/shader/Makefile | 23 +-
src/shader/exac8nv110.fp | 47 +++
src/shader/exac8nv110.fpc | 38 ++
src/shader/exacanv110.fp | 47 +++
src/shader/exacanv110.fpc | 38 ++
src/shader/exacmn...
2016 Oct 27
0
[PATCH v2 1/7] exa: add GM10x acceleration support
...at alum.mit.edu>
---
src/Makefile.am | 16 ++++++++
src/nouveau_copy.c | 1 +
src/nouveau_exa.c | 2 +-
src/nouveau_xv.c | 2 +-
src/nv_accel_common.c | 1 +
src/nv_driver.c | 1 +
src/nvc0_accel.c | 37 ++++++++++++++---
src/nvc0_exa.c | 48 ++++++++++++++++++++--
src/nvc0_xv.c | 48 ++++++++++++++++++++--
src/shader/Makefile | 23 ++++++++---
src/shader/exac8nv110.fp | 47 +++++++++++++++++++++
src/shader/exac8nv110.fpc | 38 +++++++++++++++++
src/shader/exacanv110.fp | 47 +++++++++++++++++...
2016 Oct 17
0
[PATCH] exa: add GM10x acceleration support
...ile.am | 16 ++++++++
> src/nouveau_copy.c | 1 +
> src/nouveau_exa.c | 2 +-
> src/nouveau_xv.c | 2 +-
> src/nv_accel_common.c | 1 +
> src/nv_driver.c | 1 +
> src/nvc0_accel.c | 37 ++++++++++++++---
> src/nvc0_exa.c | 48 ++++++++++++++++++++--
> src/nvc0_xv.c | 48 ++++++++++++++++++++--
> src/shader/Makefile | 23 ++++++++---
> src/shader/exac8nv110.fp | 47 +++++++++++++++++++++
> src/shader/exac8nv110.fpc | 38 +++++++++++++++++
> src/shader/exacanv110.fp...
2012 Sep 25
4
[Bug 55310] New: incorrect rendering of some borders in certain gtk3 themes
https://bugs.freedesktop.org/show_bug.cgi?id=55310
Priority: medium
Bug ID: 55310
Assignee: nouveau at lists.freedesktop.org
Summary: incorrect rendering of some borders in certain gtk3
themes
QA Contact: xorg-team at lists.x.org
Severity: normal
Classification: Unclassified
OS: All
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
These are copied directly from the mesa repository.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/hwdefs/gm107_texture.xml.h | 365 +++++++++++++++++
src/hwdefs/nvc0_3d.xml.h | 867 +++++++++++++++++++++++++----------------
2 files changed, 892 insertions(+), 340 deletions(-)
create mode 100644 src/hwdefs/gm107_texture.xml.h
diff --git