Displaying 8 results from an estimated 8 matches for "nv_wi32".
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nv_ri32
2010 Mar 23
1
[PATCH] drm/nouveau: fix vbios load and check functions on PowerPC
...F_node(dev->pdev);
- if (!dn) {
- NV_INFO(dev, "Unable to get the OF node\n");
- return;
- }
+ size_int = sizeof(uint32_t);
bios = of_get_property(dn, "NVDA,BMP", &size);
+ /* write bios data and sum all bytes */
if (bios) {
- for (i = 0; i < size; i += 4)
- nv_wi32(dev, i, bios[i/4]);
- NV_INFO(dev, "OF bios successfully copied (%d bytes)\n", size);
+ for (j = 0, i = 0; j < (size / size_int); j++, i += 4) {
+ nv_wi32(dev, i, bios[j]);
+ sum += (bios[j] & 0xFF000000) >> 24;
+ sum += (bios[j] & 0xFF0000) >> 16;
+ sum +...
2009 Dec 15
2
[PATCH 1/2] drm/nv04: Fix NV04 set_operation software method.
...ff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index 396ee92..d561d77 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -543,7 +543,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
nv_wi32(dev, instance, tmp);
nv_wr32(dev, NV04_PGRAPH_CTX_SWITCH1, tmp);
- nv_wr32(dev, NV04_PGRAPH_CTX_CACHE1 + subc, tmp);
+ nv_wr32(dev, NV04_PGRAPH_CTX_CACHE1 + (subc<<2), tmp);
return 0;
}
--
1.6.5.6
2010 Feb 07
3
[PATCH] drm/nouveau: don't hold spin lock while calling kzalloc with GFP_KERNEL
...t;
ret = nouveau_gpuobj_new_fake(dev, NV40_RAMFC(chan->id), ~0,
@@ -45,6 +46,8 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
if (ret)
return ret;
+ spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
+
dev_priv->engine.instmem.prepare_access(dev, true);
nv_wi32(dev, fc + 0, chan->pushbuf_base);
nv_wi32(dev, fc + 4, chan->pushbuf_base);
@@ -63,6 +66,8 @@ nv40_fifo_create_context(struct nouveau_channel *chan)
/* enable the fifo dma operation */
nv_wr32(dev, NV04_PFIFO_MODE,
nv_rd32(dev, NV04_PFIFO_MODE) | (1 << chan->id));
+
+ spin...
2010 Apr 11
1
[PATCH 2/2] drm/nv04: Implement missing nv04 PGRAPH methods in software.
...4_PGRAPH_CTX_SWITCH4) & 0xffff) << 4;
@@ -542,77 +615,509 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
uint32_t tmp;
tmp = nv_ri32(dev, instance);
- tmp &= ~0x00038000;
- tmp |= ((data & 7) << 15);
+ tmp &= ~mask;
+ tmp |= value;
nv_wi32(dev, instance, tmp);
nv_wr32(dev, NV04_PGRAPH_CTX_SWITCH1, tmp);
nv_wr32(dev, NV04_PGRAPH_CTX_CACHE1 + (subc<<2), tmp);
- return 0;
}
-static int
-nv04_graph_mthd_bind_surface(struct nouveau_channel *chan, int grclass,
- int mthd, uint32_t data)
+static void
+nv04_graph_set_ctx...
2010 Apr 11
1
[PATCH 1/2] drm/nouveau: Use 0x5f instead of 0x9f as imageblit on original NV10.
Signed-off-by: Marcin Ko?cielnicki <koriakin at 0x04.net>
---
drivers/gpu/drm/nouveau/nv04_fbcon.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 813b25c..7cf9287 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -236,7 +236,7 @@
2009 Sep 20
1
[PATCH 1/2] drm/nouveau: unify logging format with DRM core
...drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 29cf085..a856099 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1151,9 +1151,13 @@ static inline void nv_wo32(struct drm_device *dev, struct nouveau_gpuobj *obj,
nv_wi32(dev, obj->im_pramin->start + index * 4, val);
}
-/* logging */
+/*
+ * Logging
+ * Argument d is (struct drm_device *).
+ */
#define NV_PRINTK(level, d, fmt, arg...) \
- printk(level "nouveau %s: " fmt, pci_name(d->pdev), ##arg)
+ printk(level "[" DRM_NAME "] &...
2020 Mar 15
2
Status of GF108GLM [NVS 5200M]
Hello.
I am not subscribed to the list, so, please, if I do anything wrong
just let me know politely and I'll try to improve :)
I just want to know if there's any branch of nouveau version that will
work with this chip. lspci lists it as:
01:00.0 VGA compatible controller: NVIDIA Corporation GF108GLM [NVS
5200M] (rev a1)
I think it's Fermi, but I am not sure. When I try to change
2020 Apr 10
2
Status of GF108GLM [NVS 5200M]
...don't have the time to diagnose.
If I can get this to compile I'll get back to this thread. Any recommendations
on kernel version, compiler or whatever might work better for that branch
is welcome though.
CCLD bin/nv_rd16
CCLD bin/nv_ws32
CCLD bin/nv_ri08
CCLD bin/nv_wi32
CCLD bin/nv_wi16
CCLD bin/nv_init
CCLD bin/nv_ws16
CCLD bin/nv_ri16
CCLD bin/nv_rd32
CCLD bin/nv_rd08
CCLD bin/nv_rs08
CCLD bin/nv_rv32
CCLD bin/nv_perfmon
bin/nv_perfmon.c: En la funci?n ?ui_perfmon_query_signals?:
bin/nv_perfmon.c:316:40: avis...