Displaying 6 results from an estimated 6 matches for "nv_mem_access_sys".
2013 Dec 25
1
[PATCH] drm/nve4: fix size of POLY2ESETUP buffer (s/gpc_nr/tpc_total)
....c
index e2de73e..fc1cc32 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
@@ -813,7 +813,7 @@ nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
- mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
+ mmio_data(priv->tpc_total << 17, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x...
2013 Dec 25
0
[PATCH] drm/nve4: fix size of POLY2ESETUP buffer
....c
index e2de73e..ff0960f 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c
@@ -813,7 +813,7 @@ nve4_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
- mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
+ mmio_data(priv->gpc_nr << 17, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_list(0x408010, 0x80000000, 0, 0);
mmio_list(0x419004, 0x000...
2014 Jun 07
0
[RFC PATCH] drm/gk208/gr: adjust a couple of init values
...aph/ctxnv108.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv108.c
@@ -537,6 +537,7 @@ nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
u32 magic[GPC_MAX][2];
u32 offset;
int gpc;
+ u32 r17e91c, r17e920;
mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
@@ -571,8 +572,10 @@ nv108_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
offset += 0x07ff * priv->tpc_nr[gpc];
}
- mmio_list(0x17e91c, 0x0b040a0b, 0, 0);
- mmio_list(0x17e920, 0x00090d08, 0...
2014 Apr 17
0
[PATCH] drm/nouveau: add some basic debugfs dumping for nouveau's clients and vm mappings
...*m, void *data)
return 0;
}
+static void nouveau_get_access(char *ba, u32 access)
+{
+ if (access & NV_MEM_ACCESS_RO)
+ *ba++ = 'R';
+ else
+ *ba++ = '-';
+
+ if (access & NV_MEM_ACCESS_WO)
+ *ba++ = 'W';
+ else
+ *ba++ = '-';
+
+ if (access & NV_MEM_ACCESS_SYS)
+ *ba++ = 'S';
+
+ if (access & NV_MEM_ACCESS_NOSNOOP)
+ *ba++ = 'N';
+
+ *ba = 0;
+}
+
+static const char *nouveau_get_mapping(enum nouveau_vma_mapping mapping)
+{
+ switch (mapping) {
+ case NOUVEAU_MAP_UNMAPPED: return "unmapped";
+ case NOUVEAU_MAP_SG: return &q...
2015 Apr 16
15
[PATCH 0/6] map big page by platform IOMMU
Hi,
Generally the the imported buffers which has memory type TTM_PL_TT are
mapped as small pages probably due to lack of big page allocation. But the
platform device which also use memory type TTM_PL_TT, like GK20A, can
*allocate* big page though the IOMMU hardware inside the SoC. This is a try
to map the imported buffers as big pages in GMMU by the platform IOMMU. With
some preparation work to
2013 May 19
29
[Bug 64774] New: nouveau GF108 kernel crash in optimus mode when enabling external display output
https://bugs.freedesktop.org/show_bug.cgi?id=64774
Priority: medium
Bug ID: 64774
Assignee: nouveau at lists.freedesktop.org
Summary: nouveau GF108 kernel crash in optimus mode when
enabling external display output
QA Contact: xorg-team at lists.x.org
Severity: major
Classification: Unclassified