Displaying 7 results from an estimated 7 matches for "nv50_fifo".
2010 Feb 07
3
[PATCH] drm/nouveau: don't hold spin lock while calling kzalloc with GFP_KERNEL
...drivers/gpu/drm/nouveau/nouveau_drv.h | 4 +++-
drivers/gpu/drm/nouveau/nouveau_irq.c | 4 ++--
drivers/gpu/drm/nouveau/nouveau_state.c | 2 +-
drivers/gpu/drm/nouveau/nv04_fifo.c | 5 +++++
drivers/gpu/drm/nouveau/nv40_fifo.c | 5 +++++
drivers/gpu/drm/nouveau/nv50_fifo.c | 4 ++++
7 files changed, 22 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index d25ed61..f7ca950 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@...
2010 Feb 02
2
[PATCH 1/6] drm/nv50: align size of buffer object to the right boundaries.
- In the current situation the padding that is added is dangerous to write to,
userspace could potentially overwrite parts of another bo.
- Depth and stencil buffers are supposed to be large enough in general so the
waste of memory should be acceptable.
- Alternatives are hiding the padding from users or splitting vram into 2
zones.
Signed-off-by: Maarten Maathuis <madman2003 at gmail.com>
2010 Mar 01
0
[PATCH 2/2 V2] drm/nv50: Improve PGRAPH interrupt handling.
...u_channel.o nouveau_mem.o \
nouveau_dp.o nouveau_grctx.o \
nv04_timer.o \
nv04_mc.o nv40_mc.o nv50_mc.o \
- nv04_fb.o nv10_fb.o nv40_fb.o \
+ nv04_fb.o nv10_fb.o nv40_fb.o nv50_fb.o \
nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
nv04_graph.o nv10_graph.o nv20_graph.o \
nv40_graph.o nv50_graph.o \
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 2f8ce42..ad2d75d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nou...
2010 Feb 28
1
[PATCH 1/2] drm/nv50: Make ctxprog wait until interrupt handler is done.
This will fix races between generated ctxprogs and interrupt handler.
Signed-off-by: Marcin Ko?cielnicki <koriakin at 0x04.net>
---
drivers/gpu/drm/nouveau/nv50_grctx.c | 5 +++++
1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c
index d105fcd..9f909ab 100644
---
2007 Jul 30
0
Nouveau and Debian Unstable
...nv04_fb.o
CC [M] /home/michael/drm/linux-core/nv10_fb.o
CC [M] /home/michael/drm/linux-core/nv40_fb.o
CC [M] /home/michael/drm/linux-core/nv04_fifo.o
CC [M] /home/michael/drm/linux-core/nv10_fifo.o
CC [M] /home/michael/drm/linux-core/nv40_fifo.o
CC [M] /home/michael/drm/linux-core/nv50_fifo.o
CC [M] /home/michael/drm/linux-core/nv04_graph.o
CC [M] /home/michael/drm/linux-core/nv10_graph.o
CC [M] /home/michael/drm/linux-core/nv20_graph.o
CC [M] /home/michael/drm/linux-core/nv30_graph.o
CC [M] /home/michael/drm/linux-core/nv40_graph.o
CC [M] /home/michael/drm/linux-cor...
2019 Jun 20
2
[PATCH] drm/nouveau: fix bogus GPL-2 license header
.../drm/nouveau/nvkm/engine/fifo/channv50.h
index 2e3c4005b874..5735ff72a9d1 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h
@@ -1,4 +1,4 @@
-/* SPDX-License-Identifier: GPL-2.0 */
+/* SPDX-License-Identifier: MIT */
#ifndef __NV50_FIFO_CHAN_H__
#define __NV50_FIFO_CHAN_H__
#define nv50_fifo_chan(p) container_of((p), struct nv50_fifo_chan, base)
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.h
index 68f97ba03df6..b8642490eb2f 100644
--- a/drivers/gpu/drm/nouveau/nvk...
2010 Feb 25
3
[PATCH 1/3] drm/nv50: Implement ctxprog/state generation.
...au/Makefile b/drivers/gpu/drm/nouveau/Makefile
index 48c290b..32db806 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -16,7 +16,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
nv04_graph.o nv10_graph.o nv20_graph.o \
nv40_graph.o nv50_graph.o \
- nv40_grctx.o \
+ nv40_grctx.o nv50_grctx.o \
nv04_instmem.o nv50_instmem.o \
nv50_crtc.o nv50_dac.o nv50_sor.o \
nv50_cursor.o nv5...