Displaying 20 results from an estimated 21 matches for "nv50_defs".
2014 Jan 23
2
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...we cannot set the rt height to 64? After all you
explicitly set the format to NONE.
Either way this patch looks good afaics
Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
> ---
> src/gallium/drivers/nouveau/nv50/nv50_defs.xml.h | 1 +
> src/gallium/drivers/nouveau/nv50/nv50_formats.c | 1 -
> .../drivers/nouveau/nv50/nv50_state_validate.c | 30 +++++++++++++++++++---
> .../drivers/nouveau/nvc0/nvc0_state_validate.c | 28 +++++++++++++++++---
> 4 files changed, 52 insertions(+), 8 deletions...
2014 Jan 15
3
[PATCH] nv50, nvc0: don't crash on a null cbuf
This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers
as specified by glDrawBuffers).
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
Not sure whether something needs to be done to clear out the old RT_* settings
for that index buffer, or if things are cleared out implicitly. Perhaps
instead of skipping indices, RT_CONTROL needs to be adjusted with the
2014 Jan 17
0
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...bind NULL colorbuffers
as specified by glDrawBuffers).
This implementation is highly based on a larger commit by
Christoph Bumiller <e0425955 at student.tuwien.ac.at> in his gallium-nine
branch.
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/nouveau/nv50/nv50_defs.xml.h | 1 +
src/gallium/drivers/nouveau/nv50/nv50_formats.c | 1 -
.../drivers/nouveau/nv50/nv50_state_validate.c | 30 +++++++++++++++++++---
.../drivers/nouveau/nvc0/nvc0_state_validate.c | 28 +++++++++++++++++---
4 files changed, 52 insertions(+), 8 deletions(-)
diff --git a/sr...
2014 Jan 23
0
[PATCH v2] nv50, nvc0: clear out RT on a null cbuf
...ph's
code, I assumed he did it that way for a reason.
>
> Either way this patch looks good afaics
> Reviewed-by: Emil Velikov <emil.l.velikov at gmail.com>
>> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
>> ---
>> src/gallium/drivers/nouveau/nv50/nv50_defs.xml.h | 1 +
>> src/gallium/drivers/nouveau/nv50/nv50_formats.c | 1 -
>> .../drivers/nouveau/nv50/nv50_state_validate.c | 30 +++++++++++++++++++---
>> .../drivers/nouveau/nvc0/nvc0_state_validate.c | 28 +++++++++++++++++---
>> 4 files changed, 52 insertions...
2014 Mar 18
2
data error enum documentation
...us know what those errors are? (Or,
even better, provide the full table so that we'll have a better idea
in future cases as well.)
Here are a few that we know about, so you know exactly what table I'm
talking about (our full list at
https://github.com/envytools/envytools/blob/master/rnndb/nv50_defs.xml#L192):
0x04: INVALID_VALUE
0x05: INVALID_ENUM
0x08: INVALID_OBJECT
0x0c: INVALID_BITFIELD
0x3f: PRIMITIVE_ID_NEEDS_GP
We read this data error value from mmio reg 0x400110.
Furthermore, if you could provide any insight as to why we would see
those errors on GF106 but not any other Fermi/Keple...
2016 Oct 27
2
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
> index 607e97b..959f67f 100644
> --- a/src/nvc0_accel.h
> +++ b/src/nvc0_accel.h
> @@ -7,6 +7,7 @@
> #include "hwdefs/nvc0_m2mf.xml.h"
> #include "hwdefs/nv50_defs.xml.h"
> #include "hwdefs/nv50_texture.h"
> +#include "hwdefs/gm107_texture.xml.h"
> #include "hwdefs/nv_3ddefs.xml.h"
>
> /* subchannel assignments, compatible with kepler's fixed layout */
> @@ -108,4 +109,59 @@ PUSH_DATAu(struct nouvea...
2014 Dec 31
2
[PATCH 1/2] nv50: regenerate rnndb headers
...ed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
---
src/gallium/drivers/nouveau/nv50/nv50_2d.xml.h | 133 +++---
src/gallium/drivers/nouveau/nv50/nv50_3d.xml.h | 449 +++++++++++----------
src/gallium/drivers/nouveau/nv50/nv50_3ddefs.xml.h | 55 ++-
src/gallium/drivers/nouveau/nv50/nv50_defs.xml.h | 94 ++++-
src/gallium/drivers/nouveau/nv50/nv50_formats.c | 12 +-
src/gallium/drivers/nouveau/nv50/nv50_program.c | 2 +-
src/gallium/drivers/nouveau/nv50/nv50_state.c | 4 +-
.../drivers/nouveau/nv50/nv50_state_validate.c | 2 +-
src/gallium/drivers/nouveau/nv50/n...
2014 Apr 30
0
data error enum documentation
...? (Or,
> even better, provide the full table so that we'll have a better idea
> in future cases as well.)
>
> Here are a few that we know about, so you know exactly what table I'm
> talking about (our full list at
> https://github.com/envytools/envytools/blob/master/rnndb/nv50_defs.xml#L192):
>
> 0x04: INVALID_VALUE
> 0x05: INVALID_ENUM
> 0x08: INVALID_OBJECT
> 0x0c: INVALID_BITFIELD
> 0x3f: PRIMITIVE_ID_NEEDS_GP
>
> We read this data error value from mmio reg 0x400110.
>
> Furthermore, if you could provide any insight as to why we would see
&...
2016 Oct 17
2
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...> BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
> index 607e97b..9378236 100644
> --- a/src/nvc0_accel.h
> +++ b/src/nvc0_accel.h
> @@ -7,6 +7,7 @@
> #include "hwdefs/nvc0_m2mf.xml.h"
> #include "hwdefs/nv50_defs.xml.h"
> #include "hwdefs/nv50_texture.h"
> +#include "hwdefs/gm107_texture.xml.h"
> #include "hwdefs/nv_3ddefs.xml.h"
>
> /* subchannel assignments, compatible with kepler's fixed layout */
> @@ -108,4 +109,59 @@ PUSH_DATAu(struct nouvea...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
..._3D(CODE_ADDRESS_HIGH), 2);
>> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
>> index 607e97b..959f67f 100644
>> --- a/src/nvc0_accel.h
>> +++ b/src/nvc0_accel.h
>> @@ -7,6 +7,7 @@
>> #include "hwdefs/nvc0_m2mf.xml.h"
>> #include "hwdefs/nv50_defs.xml.h"
>> #include "hwdefs/nv50_texture.h"
>> +#include "hwdefs/gm107_texture.xml.h"
>> #include "hwdefs/nv_3ddefs.xml.h"
>>
>> /* subchannel assignments, compatible with kepler's fixed layout */
>> @@ -108,4 +109,59 @@...
2016 Oct 16
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
...USH_DATA (push, 0x88888888);
+ }
}
BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
index 607e97b..9378236 100644
--- a/src/nvc0_accel.h
+++ b/src/nvc0_accel.h
@@ -7,6 +7,7 @@
#include "hwdefs/nvc0_m2mf.xml.h"
#include "hwdefs/nv50_defs.xml.h"
#include "hwdefs/nv50_texture.h"
+#include "hwdefs/gm107_texture.xml.h"
#include "hwdefs/nv_3ddefs.xml.h"
/* subchannel assignments, compatible with kepler's fixed layout */
@@ -108,4 +109,59 @@ PUSH_DATAu(struct nouveau_pushbuf *push, struct nouv...
2016 Oct 27
0
[PATCH v2 5/7] nvc0: refactor TIC uploads to allow different specifics per generation
...USH_DATA (push, 0x88888888);
+ }
}
BEGIN_NVC0(push, NVC0_3D(CODE_ADDRESS_HIGH), 2);
diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
index 607e97b..959f67f 100644
--- a/src/nvc0_accel.h
+++ b/src/nvc0_accel.h
@@ -7,6 +7,7 @@
#include "hwdefs/nvc0_m2mf.xml.h"
#include "hwdefs/nv50_defs.xml.h"
#include "hwdefs/nv50_texture.h"
+#include "hwdefs/gm107_texture.xml.h"
#include "hwdefs/nv_3ddefs.xml.h"
/* subchannel assignments, compatible with kepler's fixed layout */
@@ -108,4 +109,59 @@ PUSH_DATAu(struct nouveau_pushbuf *push, struct nouv...
2016 Oct 17
0
[PATCH 4/5] nvc0: refactor TIC uploads to allow different specifies per generation
..._3D(CODE_ADDRESS_HIGH), 2);
>> diff --git a/src/nvc0_accel.h b/src/nvc0_accel.h
>> index 607e97b..9378236 100644
>> --- a/src/nvc0_accel.h
>> +++ b/src/nvc0_accel.h
>> @@ -7,6 +7,7 @@
>> #include "hwdefs/nvc0_m2mf.xml.h"
>> #include "hwdefs/nv50_defs.xml.h"
>> #include "hwdefs/nv50_texture.h"
>> +#include "hwdefs/gm107_texture.xml.h"
>> #include "hwdefs/nv_3ddefs.xml.h"
>>
>> /* subchannel assignments, compatible with kepler's fixed layout */
>> @@ -108,4 +109,59 @@...
2016 Feb 15
24
[PATCH 01/23] nv50: import updated g80_defs.xml.h from rnndb
From: Ben Skeggs <bskeggs at redhat.com>
Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
---
src/gallium/drivers/nouveau/nv50/g80_defs.xml.h | 279 ++++++++++++++++++++++++
1 file changed, 279 insertions(+)
create mode 100644 src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
diff --git a/src/gallium/drivers/nouveau/nv50/g80_defs.xml.h
2014 Dec 31
0
[PATCH 2/2] nvc0: regenerate rnndb headers
...nvc0_2d.xml ( 9454 bytes, from 2010-10-16 16:03:11)
-- copyright.xml ( 6498 bytes, from 2010-10-03 13:18:37)
-- nv_object.xml ( 11379 bytes, from 2010-10-16 11:43:24)
-- nvchipsets.xml ( 2907 bytes, from 2010-10-15 16:28:21)
-- nv_defs.xml ( 4437 bytes, from 2010-07-06 07:43:58)
-- nv50_defs.xml ( 4482 bytes, from 2010-10-03 13:18:37)
-
-Copyright (C) 2006-2010 by the following authors:
-- Artur Huillet <arthur.huillet at free.fr> (ahuillet)
-- Ben Skeggs (darktama, darktama_)
-- B. R. <koala_br at users.sourceforge.net> (koala_br)
-- Carlos Martin <carlosmn at users....
2016 Oct 16
10
[PATCH 1/5] hwdefs: update nvc0_3d, add gm107_texture for new TIC format
...db/nv_object.xml ( 12672 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nvchipsets.xml ( 3617 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv_defs.xml ( 4437 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv50_defs.xml ( 5468 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nvc0_m2mf.xml ( 2687 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv01_2d.xml ( 32584 bytes, from 2011-10-22 08:01:09)
-- /home/skeggsb/git/envytools/rnndb/nv04_dvd.xml...
2014 Jun 17
0
[PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
...}
boolean
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
index 9a1a717..6364c3b 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
@@ -4,6 +4,10 @@
#include "nv50/nv50_defs.xml.h"
#include "nvc0/nvc0_compute.xml.h"
+void nvc0_context_compute_setup(struct nvc0_context *nvc0);
+
+int nvc0_screen_compute_setup(struct nvc0_screen *);
+
boolean
nvc0_compute_validate_program(struct nvc0_context *nvc0);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0...
2014 Jun 17
2
[PATCH try 2 1/2] gallium/nouveau: decouple nouveau_fence implementation from screen
Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
---
src/gallium/drivers/nouveau/nouveau_fence.c | 76 ++++++++++++-------------
src/gallium/drivers/nouveau/nouveau_fence.h | 22 +++++--
src/gallium/drivers/nouveau/nouveau_screen.c | 9 +++
src/gallium/drivers/nouveau/nouveau_screen.h | 14 ++---
src/gallium/drivers/nouveau/nv30/nv30_context.c | 4 +-
2014 Jun 21
3
[Mesa-dev] [PATCH try 2 2/2] gallium/nouveau: move pushbuf and fences to context
.../src/gallium/drivers/nouveau/nvc0/nvc0_compute.h b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
> index 9a1a717..6364c3b 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
> @@ -4,6 +4,10 @@
> #include "nv50/nv50_defs.xml.h"
> #include "nvc0/nvc0_compute.xml.h"
>
> +void nvc0_context_compute_setup(struct nvc0_context *nvc0);
> +
> +int nvc0_screen_compute_setup(struct nvc0_screen *);
> +
> boolean
> nvc0_compute_validate_program(struct nvc0_context *nvc0);
>
> diff...
2016 Oct 27
11
[PATCH v2 0/7] Add Maxwell support
I believe I've addressed all the feedback from the first time around, and
also made fixes necessary for GM20x based on testing results. I believe
now it should actually work for all GM10x and GM20x. Further, GP10x should
be very easy to add, but without someone to actually test I didn't want to
claim support for it.
Ilia Mirkin (7):
exa: add GM10x acceleration support
hwdefs: update