search for: numops

...th SSE In X86InstrSSE.td, a MFENCE is def MFENCE : I<0xAE, MRM6m, (outs), (ins), "mfence", [(int_x86_sse2_mfence)]>, TB, Requires< [HasSSE2]>; In X86CodeEmitter.cpp in emitInstruction case X86II::MRM6m: case X86II::MRM7m: { intptr_t PCAdj = (CurOp+4 != NumOps) ? (MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm (Desc) : 4) : 0; ... If I'm reading the code correctly, the NumOps is 0 and CurOp is 0 so we to get the 4th operand from the MFENCE operation which has no operands so we get an error. I'm not sure what this code i...

...%R_0_REG2048b_1<kill>, %R_0_REG2048b_0<kill> I am getting the following error: Unknown immediate size UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! i made extensive use of gdb and after debugging i found the line with issue in X86MCCodeEmitter.cpp. Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. then, the following code gets executed; case X86II::MRMDestReg: { EmitByte(BaseOpcode, CurByte, OS); unsigned SrcRegNum = CurOp + 1; //SrcRegNum=1 EmitRegModRMByte(MI.getOperand(CurOp), GetX86RegNum(MI.getOperand(S...

...nst TargetInstrDesc &Desc = MI.getDesc(); > - > - // Pseudo instructions do not need REX prefix byte. > - if ((Desc.TSFlags & X86II::FormMask) == X86II::Pseudo) > - return 0; > - if (Desc.TSFlags & X86II::REX_W) > - REX |= 1 << 3; > - > - unsigned NumOps = Desc.getNumOperands(); > - if (NumOps) { > - bool isTwoAddr = NumOps > 1 && > - Desc.getOperandConstraint(1, TOI::TIED_TO) != -1; > - > - // If it accesses SPL, BPL, SIL, or DIL, then it requires a > 0x40 REX prefix. > - unsigned i = isTwoAddr ? 1...

OK, here's a new patch that adds the infrastructure and the implementation for X86, ARM and PPC of GetInstSize and GetFunctionSize. Both functions are virtual functions defined in TargetInstrInfo.h. For X86, I moved some commodity functions from X86CodeEmitter to X86InstrInfo. What do you think? Nicolas Evan Cheng wrote: > > I think both of these belong to TargetInstrInfo. And

...ollowing error: >> >> Unknown immediate size >> UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! >> >> >> i made extensive use of gdb and after debugging i found the line with >> issue in X86MCCodeEmitter.cpp. >> >> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >> >> then, the following code gets executed; >> >> case X86II::MRMDestReg: { >> EmitByte(BaseOpcode, CurByte, OS); >> unsigned SrcRegNum = CurOp + 1; //SrcRegNum=1 >> EmitRegModRMByte(MI.getOper...

...>>>> UNREACHABLE executed at /lib/Target/X86/MCTargetDesc/X86BaseInfo.h:574! >>>> >>>> >>>> i made extensive use of gdb and after debugging i found the line with >>>> issue in X86MCCodeEmitter.cpp. >>>> >>>> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >>>> >>>> then, the following code gets executed; >>>> >>>> case X86II::MRMDestReg: { >>>> EmitByte(BaseOpcode, CurByte, OS); >>>> unsigned SrcRegNum = CurOp + 1; //...

...E is > def MFENCE : I<0xAE, MRM6m, (outs), (ins), > "mfence", [(int_x86_sse2_mfence)]>, TB, Requires< > [HasSSE2]>; > > In X86CodeEmitter.cpp in emitInstruction > > case X86II::MRM6m: case X86II::MRM7m: { > intptr_t PCAdj = (CurOp+4 != NumOps) ? > (MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm > (Desc) : 4) : 0; > ... > > If I'm reading the code correctly, the NumOps is 0 and CurOp is 0 so > we to get the 4th operand from the MFENCE operation which has no > operands so we get an error. I'...

...lt;0xAE, MRM6m, (outs), (ins), >> "mfence", [(int_x86_sse2_mfence)]>, TB, Requires< >> [HasSSE2]>; >> >> In X86CodeEmitter.cpp in emitInstruction >> >> case X86II::MRM6m: case X86II::MRM7m: { >> intptr_t PCAdj = (CurOp+4 != NumOps) ? >> (MI.getOperand(CurOp+4).isImm() ? X86InstrInfo::sizeOfImm >> (Desc) : 4) : 0; >> ... >> >> If I'm reading the code correctly, the NumOps is 0 and CurOp is 0 so >> we to get the 4th operand from the MFENCE operation which has no >> operands s...

...gt;>>>>> 86BaseInfo.h:574! >>>>>> >>>>>> >>>>>> i made extensive use of gdb and after debugging i found the line >>>>>> with issue in X86MCCodeEmitter.cpp. >>>>>> >>>>>> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >>>>>> >>>>>> then, the following code gets executed; >>>>>> >>>>>> case X86II::MRMDestReg: { >>>>>> EmitByte(BaseOpcode, CurByte, OS); >>>&gt...

...rDAG->getLoad(SpillVal.getValueType(), SpillVal.getDebugLoc(), > Chain, SpillSlot, > MachinePointerInfo::getFixedStack(FI), > false, false, false, 0); > > SmallVector<SDValue, 4> Ops; > unsigned NumOps = Node->getNumOperands(); > > for (unsigned i = 0; i < NumOps; ++i) { > if (i == OpNo) > Ops.push_back(Chain); > else > Ops.push_back(Node->getOperand(i)); > } > > CurDAG->UpdateNodeOperands(Node, &Ops[0], NumOps); > > Note: you...

...t;>>>>>> >>>>>>>> >>>>>>>> i made extensive use of gdb and after debugging i found the line >>>>>>>> with issue in X86MCCodeEmitter.cpp. >>>>>>>> >>>>>>>> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >>>>>>>> >>>>>>>> then, the following code gets executed; >>>>>>>> >>>>>>>> case X86II::MRMDestReg: { >>>>>>>> EmitByte(B...

...gt;>>>>>> >>>>>>>>>> i made extensive use of gdb and after debugging i found the >>>>>>>>>> line with issue in X86MCCodeEmitter.cpp. >>>>>>>>>> >>>>>>>>>> Here NumOps=3 (all registers). and CurOp is 1st initialized to 0. >>>>>>>>>> >>>>>>>>>> then, the following code gets executed; >>>>>>>>>> >>>>>>>>>> case X86II::MRMDestReg: { >>>&gt...

...urDAG->getLoad(SpillVal.getValueType(), SpillVal.getDebugLoc(), > Chain, SpillSlot, > MachinePointerInfo::getFixedStack(FI), > false, false, false, 0); > > SmallVector<SDValue, 4> Ops; > unsigned NumOps = Node->getNumOperands(); > > for (unsigned i = 0; i < NumOps; ++i) { > if (i == OpNo) > Ops.push_back(Chain); > else > Ops.push_back(Node->getOperand(i)); > } > > CurDAG->UpdateNodeOperands(Node, &Ops[0], NumOps); > > Note: you ca...

Hi, I was wondering if someone could explain precisely what the ComplexPattern tablegen class does? Here's the first line of the definition (from TargetSelectionDAG.td) for reference: class ComplexPattern<ValueType ty, int numops, string fn, list<SDNode> roots = [], list<SDNodeProperty> props = [], list<CPAttribute> attrs = []> As far as I can tell it gives the name of a selection function (fn) that will be called to match that particul...

...= cast<ConstantSDNode>(Op.getOperand(2))->getValue() != 0; assert(!isVarArg); bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))->getValue() != 0; SDOperand Callee = Op.getOperand(4); MVT::ValueType RetVT= Op.Val->getValueType(0); unsigned NumOps = (Op.getNumOperands() - 5) / 2; std::string Name; if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) Name = G->getGlobal()->getName(); else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) Name = S->getSymbol(); uns...

...>>>>>>>>>>> i made extensive use of gdb and after debugging i found the >>>>>>>>>>>> line with issue in X86MCCodeEmitter.cpp. >>>>>>>>>>>> >>>>>>>>>>>> Here NumOps=3 (all registers). and CurOp is 1st initialized to >>>>>>>>>>>> 0. >>>>>>>>>>>> >>>>>>>>>>>> then, the following code gets executed; >>>>>>>>>>>> >>&...

...lue() != 0; > > assert(!isVarArg); > > bool isTailCall = cast<ConstantSDNode>(Op.getOperand(3))- > > >getValue() != 0; > > SDOperand Callee = Op.getOperand(4); > > MVT::ValueType RetVT= Op.Val->getValueType(0); > > unsigned NumOps = (Op.getNumOperands() - 5) / 2; > > > > std::string Name; > > if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode> > > (Callee)) > > Name = G->getGlobal()->getName(); > > else if (ExternalSymbolSDNode *S = > > dyn_cast...

...mTailCallOpt || + cast<ConstantSDNode>(Call.getOperand(2))->getValue() != 0) return false; + + + + So many blank lines... :-) + // Check whether CALL node immediatly preceeds the RET node and whether the + // return uses the result of the node or is a void return. + unsigned NumOps = Ret.getNumOperands(); + if ((NumOps == 1 && + (Ret.getOperand(0) == SDOperand(Call.Val,1) || + Ret.getOperand(0) == SDOperand(Call.Val,0))) || + (NumOps > 1 && + Ret.getOperand(0) == SDOperand(Call.Val,Call.Val- >getNumValues()-1) && +...

...es... :-) done :) you wouldn't have by any chance an evan awk script that checks for my stupid fomatting mistakes :) > + // Check whether CALL node immediatly preceeds the RET node and > whether the > + // return uses the result of the node or is a void return. > + unsigned NumOps = Ret.getNumOperands(); > + if ((NumOps == 1 && > + (Ret.getOperand(0) == SDOperand(Call.Val,1) || > + Ret.getOperand(0) == SDOperand(Call.Val,0))) || > + (NumOps > 1 && > + Ret.getOperand(0) == SDOperand(Call.Val,Call.Val- > >...

Hello Dale, this is an updated version of the tail call optimization patch for powerpc. could you have a look at it? i added code to support ppc64 (untested, will try to get access to ppc64 on a friend's machine). incorporated evan's formatting suggestions. ;) will run another round of testing (llvm-test) on my powerpc g4/800 when i get the okay to commit. testing on this machine takes