Displaying 6 results from an estimated 6 matches for "nouveau_irq_handler".
2010 Jul 10
1
deadlock possiblity introduced by "drm/nouveau: use drm_mm in preference to custom code doing the same thing"
...... which became HARDIRQ-irq-safe at:
[ 2417.746682] [<ffffffff8109739e>] __lock_acquire+0x671/0x8f4
[ 2417.746685] [<ffffffff81097769>] lock_acquire+0x148/0x18d
[ 2417.746688] [<ffffffff8143b2cd>] _raw_spin_lock_irqsave+0x41/0x53
[ 2417.746692] [<ffffffffa00b3072>] nouveau_irq_handler+0x56/0xa48 [nouveau]
[ 2417.746698] [<ffffffff810a7b3b>] handle_IRQ_event+0xec/0x25d
[ 2417.746702] [<ffffffff810a98e1>] handle_fasteoi_irq+0x92/0xd2
[ 2417.746705] [<ffffffff81032953>] handle_irq+0x83/0x8c
[ 2417.746707] [<ffffffff81031f19>] do_IRQ+0x57/0xbe
[ 2417....
2009 Feb 16
17
[Bug 20130] New: GT200: nv50 chipset 0xa0 lockup
http://bugs.freedesktop.org/show_bug.cgi?id=20130
Summary: GT200: nv50 chipset 0xa0 lockup
Product: xorg
Version: git
Platform: x86-64 (AMD64)
OS/Version: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Driver/nouveau
AssignedTo: nouveau at lists.freedesktop.org
2010 Feb 07
3
[PATCH] drm/nouveau: don't hold spin lock while calling kzalloc with GFP_KERNEL
...offsets */
struct nouveau_gpuobj *ramht;
uint32_t ramin_rsvd_vram;
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index cffc9bc..95220dd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -697,7 +697,7 @@ nouveau_irq_handler(DRM_IRQ_ARGS)
if (!status)
return IRQ_NONE;
- spin_lock_irqsave(&dev_priv->engine.lock, flags);
+ spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
if (dev_priv->fbdev_info) {
fbdev_flags = dev_priv->fbdev_info->flags;
@@ -736,7 +736,7 @@ nouveau_irq_han...
2010 Mar 11
5
Interrupt setting
...veau wiki documents, and they imply that there are ways
to set GPU to send interrupts to CPU, when we want to be notified for
something, e.g., when DMA transfer or GPU operation is completed.
By default, when I run an OpenGL demo application from Gallium3D, the driver
gets no interrupts from GPU in nouveau_irq_handler(), except that it gets
one NV_PFIFO_INTR_CACHE_ERROR interrupt right after the FIFO is allocated.
According to the wiki docs, I need to set
NV_MEMORY_TO_MEMORY_FORMAT_NOTIFY_STYLE_WRITE_LE_AWAKEN into the 'notify'
field of an object in a channel.
Hence, I tried seting a flag to a DMA notifi...
2013 Mar 23
1
[bisected][3.9.0-rc3] NULL ptr dereference from nv50_disp_intr()
...;ffffffffa01843b5>] nv50_disp_intr+0xc5/0x200 [nouveau]
> [<ffffffff816fbacc>] ? _raw_spin_unlock_irqrestore+0x2c/0x50
> [<ffffffff816ff98d>] ? notifier_call_chain+0x4d/0x70
> [<ffffffffa017a105>] nouveau_mc_intr+0xb5/0x110 [nouveau]
> [<ffffffffa01d45ff>] nouveau_irq_handler+0x6f/0x80 [nouveau]
> [<ffffffff810eec95>] handle_irq_event_percpu+0x75/0x260
> [<ffffffff810eeec8>] handle_irq_event+0x48/0x70
> [<ffffffff810f205a>] handle_fasteoi_irq+0x5a/0x100
> [<ffffffff810182f2>] handle_irq+0x22/0x40
> [<ffffffff8170561a>] d...
2007 May 04
39
[Bug 10858] New: glxgears with mesa-git on PCI 10de0322 (NV34) GeForce FX 5200 crashes X
http://bugs.freedesktop.org/show_bug.cgi?id=10858
Summary: glxgears with mesa-git on PCI 10de0322 (NV34) GeForce FX
5200 crashes X
Product: xorg
Version: 7.2
Platform: x86 (IA32)
OS/Version: Linux (All)
Status: NEW
Severity: normal
Priority: medium
Component: Driver/nouveau