search for: nouveau_clock

Resend of patch #7 to fix behaviour when failing to pause parts of the GPU

Following a series of patches to improve nouveaus clock tree parsing. Reclocking these engines (all but memory) is pretty stable on the cards I've tested. Please review and merge when approved. These patches do not solve the problem that core/shader engine doesn't like to be clocked up too far without fb following, with visible corruption as a result. I suspect this problem is unrelated

...es? Hey Vince, Ah sorry, I thought my comment on the other patch indicated I was fine with it. I'll merge them now so they don't get lost :) Thanks, Ben. > > Thanks, > Vince > > > On 12/22/2014 05:11 PM, Vince Hsu wrote: >> >> There might be some callers of nouveau_clock_astate(), and they are from >> inetrrupt context. So we must ensure that this function can be atomic in >> that condition. This patch adds one parameter which is subsequently passed >> to nouveau_pstate_calc(). Therefore we can choose whether we want to wait >> for the pstat...

There might be some callers of nouveau_clock_astate(), and they are from inetrrupt context. So we must ensure that this function can be atomic in that condition. This patch adds one parameter which is subsequently passed to nouveau_pstate_calc(). Therefore we can choose whether we want to wait for the pstate work's completion or not. Sig...

...vers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h index 676b49e..52e65b8 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h @@ -146,6 +146,9 @@ int nv04_clock_pll_prog(struct nouveau_clock *, u32 reg1, int nva3_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *, int clk, struct nouveau_pll_vals *); +int nva3_clock_pre(struct nouveau_clock *clk, unsigned long *flags); +void nva3_clock_post(struct nouveau_clock *clk, unsigned long *flags); + int nouveau_clock_ustate(str...

...vers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h index 676b49e..52e65b8 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h @@ -146,6 +146,9 @@ int nv04_clock_pll_prog(struct nouveau_clock *, u32 reg1, int nva3_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *, int clk, struct nouveau_pll_vals *); +int nva3_clock_pre(struct nouveau_clock *clk, unsigned long *flags); +void nva3_clock_post(struct nouveau_clock *clk, unsigned long *flags); + int nouveau_clock_ustate(str...

Hello Ben and Martin, Any comments for this series? Thanks, Vince On 12/22/2014 05:11 PM, Vince Hsu wrote: > There might be some callers of nouveau_clock_astate(), and they are from > inetrrupt context. So we must ensure that this function can be atomic in > that condition. This patch adds one parameter which is subsequently passed > to nouveau_pstate_calc(). Therefore we can choose whether we want to wait > for the pstate work's com...

...c0.c | 3 ++- nvkm/subdev/clock/nve0.c | 3 ++- 9 files changed, 24 insertions(+), 12 deletions(-) diff --git a/nvkm/include/subdev/clock.h b/nvkm/include/subdev/clock.h index 8f4ced7..c01e29c 100644 --- a/nvkm/include/subdev/clock.h +++ b/nvkm/include/subdev/clock.h @@ -77,6 +77,8 @@ struct nouveau_clock { int tstate; /* thermal adjustment (max-) */ int dstate; /* display adjustment (min+) */ + bool allow_reclock; + int (*read)(struct nouveau_clock *, enum nv_clk_src); int (*calc)(struct nouveau_clock *, struct nouveau_cstate *); int (*prog)(struct nouveau_clock *); @@ -106,8 +108,8...

Re-resend of patch #7 to move the _post and _pre function prototypes to nva3.h

...diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c index a08011c..b9ab90a 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c +++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c @@ -163,17 +163,12 @@ nva3_clock_read(struct nouveau_clock *clk, enum nv_clk_src src) } int -nva3_clock_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz, +nva3_clk_info(struct nouveau_clock *clock, int clk, u32 khz, struct nva3_clock_info *info) { - struct nouveau_bios *bios = nouveau_bios(clock); struct nva3_clock_priv *priv = (void *...

Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> --- Hope I understood you correctly wrt the mem exec stuff. nvkm/subdev/fb/ramnv50.c | 2 +- nvkm/subdev/fb/ramnva3.c | 2 +- nvkm/subdev/fb/ramnvc0.c | 2 +- nvkm/subdev/fb/ramnve0.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/nvkm/subdev/fb/ramnv50.c b/nvkm/subdev/fb/ramnv50.c index ef91b6e..e5d12c2 100644

.../nve0.c | 3 ++- > 9 files changed, 24 insertions(+), 12 deletions(-) > > diff --git a/nvkm/include/subdev/clock.h b/nvkm/include/subdev/clock.h > index 8f4ced7..c01e29c 100644 > --- a/nvkm/include/subdev/clock.h > +++ b/nvkm/include/subdev/clock.h > @@ -77,6 +77,8 @@ struct nouveau_clock { > int tstate; /* thermal adjustment (max-) */ > int dstate; /* display adjustment (min+) */ > > + bool allow_reclock; > + > int (*read)(struct nouveau_clock *, enum nv_clk_src); > int (*calc)(struct nouveau_clock *, struct nouveau_cstat...

...amework, we create a simple subdev in Nouveau for the same purpose. That's because we don't want to make the DVFS implementation for GK20A far more than enough in the beginning and hinder the implementation for dGPU in the future. Thanks, Vince Vince Hsu (3): clk: allow non-blocking for nouveau_clock_astate() dvfs: add support for GK20A clk: allow users to enable auto mode when loading driver drm/Kbuild | 2 + drm/core/include/subdev/dvfs.h | 1 + drm/core/subdev/dvfs/base.c | 1 + drm/core/subdev/dvfs/gk20a.c | 1 + drm/core/subdev/dvfs/priv.h | 1 +...

...rivers/gpu/drm/nouveau/core/include/subdev/clock.h b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h index 39e73b9..41b7a6a 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/clock.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/clock.h @@ -54,6 +54,7 @@ int nv04_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *, int clk, struct nouveau_pll_vals *); int nv04_clock_pll_prog(struct nouveau_clock *, u32 reg1, struct nouveau_pll_vals *); - +int nva3_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *, + int clk, struct nouveau_pll_vals *); #endif diff --git a/drivers...

...HE SOFTWARE. + * + * Authors: Ben Skeggs + */ + +#include <engine/fifo.h> +#include <subdev/bios.h> +#include <subdev/bios/pll.h> +#include <subdev/timer.h> + +#include "nv50.h" +#include "nvaa.h" +#include "pll.h" + +static u32 +read_div(struct nouveau_clock *clk) +{ + return nv_rd32(clk, 0x004600); +} + +static u32 +read_pll(struct nouveau_clock *clk, u32 base) +{ + u32 ctrl = nv_rd32(clk, base + 0); + u32 coef = nv_rd32(clk, base + 4); + u32 ref = clk->read(clk, nv_clk_src_href); + u32 post_div = 0; + u32 clock = 0; + int N1, M1; + + switch (base)...

...nouveau_timer_alarm_cancel(dvfs, &dvfs->alarm); > + > + return nouveau_subdev_fini(&dvfs->base, suspend); > +} > + > +int > +_nouveau_dvfs_init(struct nouveau_object *object) > +{ > + struct nouveau_dvfs *dvfs = (void *)object; > + struct nouveau_clock *clk = nouveau_clock(object); > + struct nouveau_volt *volt = nouveau_volt(object); > + int ret; > + > + ret = nouveau_subdev_init(&dvfs->base); > + if (ret) > + return ret; > + > + if (!clk || !volt) > + re...

...HE SOFTWARE. + * + * Authors: Ben Skeggs + */ + +#include <engine/fifo.h> +#include <subdev/bios.h> +#include <subdev/bios/pll.h> +#include <subdev/timer.h> + +#include "nv50.h" +#include "nvaa.h" +#include "pll.h" + +static u32 +read_div(struct nouveau_clock *clk) +{ + return nv_rd32(clk, 0x004600); +} + +static u32 +read_pll(struct nouveau_clock *clk, u32 base) +{ + u32 ctrl = nv_rd32(clk, base + 0); + u32 coef = nv_rd32(clk, base + 4); + u32 ref = clk->read(clk, nv_clk_src_href); + u32 post_div = 0; + u32 clock = 0; + int N1, M1; + + switch (base)...

Second version of the gk20a clock patches. I have tried to keep the therm and volt devices mandatory in the clock driver, but unfortunately they are too tied to bios to allow this, at least for the moment. Consequently this version is mostly a port of the first version to Ben's tree. Ben, please let me know what I have done wrong in terms of integration to your tree, as the main purpose of

...>>> + return nouveau_subdev_fini(&dvfs->base, suspend); >>> +} >>> + >>> +int >>> +_nouveau_dvfs_init(struct nouveau_object *object) >>> +{ >>> + struct nouveau_dvfs *dvfs = (void *)object; >>> + struct nouveau_clock *clk = nouveau_clock(object); >>> + struct nouveau_volt *volt = nouveau_volt(object); >>> + int ret; >>> + >>> + ret = nouveau_subdev_init(&dvfs->base); >>> + if (ret) >>> + return ret; >>> +...

...ol suspend) +{ + struct nouveau_dvfs *dvfs = (void *)object; + + nouveau_timer_alarm_cancel(dvfs, &dvfs->alarm); + + return nouveau_subdev_fini(&dvfs->base, suspend); +} + +int +_nouveau_dvfs_init(struct nouveau_object *object) +{ + struct nouveau_dvfs *dvfs = (void *)object; + struct nouveau_clock *clk = nouveau_clock(object); + struct nouveau_volt *volt = nouveau_volt(object); + int ret; + + ret = nouveau_subdev_init(&dvfs->base); + if (ret) + return ret; + + if (!clk || !volt) + return -EINVAL; + + nouveau_timer_alarm(dvfs, 2000000000, &dvfs->alarm); + + return 0; +} + +voi...