search for: nouveau_bo_rd32

https://bugs.freedesktop.org/show_bug.cgi?id=63192 Pierre Moreau <pierre.morrow at free.fr> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|NEW |NEEDINFO Component|DRM/other |Driver/nouveau Version|DRI git

...be merged, but rather to try and understand why this is needed and what a more suitable solution could be. Allowing BOs to be write-cached results in the following happening when trying to run any program on Tegra/GK20A: Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 ... (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) (ttm_bo_wait) from [<c035e334>] (nouveau_gem_ioctl_cpu_prep+0x44/0x100) (nouveau_gem_io...

...d and what a more suitable solution could be. >> >> Allowing BOs to be write-cached results in the following happening when >> trying to run any program on Tegra/GK20A: >> >> Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 >> ... >> (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) >> (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) >> (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) >> (ttm_bo_wait) from [<c035e334>] (nouveau_gem_ioctl_cpu_prep+...

...struct nvc0_fence_priv *priv = drm->fence; int i; + u32 chan = pfifo->max + 1; - priv->suspend = vmalloc((pfifo->max + 1) * sizeof(u32)); + priv->suspend = vmalloc(chan * sizeof(u32)); if (priv->suspend) { - for (i = 0; i <= pfifo->max; i++) - priv->suspend[i] = nouveau_bo_rd32(priv->bo, i); + for (i = 0; i < chan; i++) + priv->suspend[i] = nouveau_bo_rd32(priv->bo, i * 16/4); } return priv->suspend != NULL; @@ -177,10 +178,11 @@ nvc0_fence_resume(struct nouveau_drm *drm) struct nouveau_fifo *pfifo = nouveau_fifo(drm->device); struct nvc0_fen...

...k [nouveau] [ 2296.863990] ? nvkm_ioctl_ntfy_get+0x69/0xb0 [nouveau] [ 2296.864032] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] [ 2296.864047] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] [ 2296.864118] Workqueue: events_unbound nv50_disp_atomic_commit_work [nouveau] [ 2296.864138] ? nouveau_bo_rd32+0x2a/0x30 [nouveau] [ 2296.864153] ? nv84_fence_read+0x2e/0x30 [nouveau] [ 2296.864175] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] [ 2296.864189] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] [ 2417.699641] Workqueue: events_unbound nv50_disp_atomic_commit_work [nouveau] [ 2417.699656...

...>> >> Allowing BOs to be write-cached results in the following happening when >> >> trying to run any program on Tegra/GK20A: >> >> >> >> Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 >> >> ... >> >> (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) >> >> (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) >> >> (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) >> >> (ttm_bo_wait) from [<c035e334>] (...

..._get+0x69/0xb0 [nouveau] >> [ 2296.864032] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] >> [ 2296.864047] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] >> [ 2296.864118] Workqueue: events_unbound nv50_disp_atomic_commit_work >> [nouveau] >> [ 2296.864138] ? nouveau_bo_rd32+0x2a/0x30 [nouveau] >> [ 2296.864153] ? nv84_fence_read+0x2e/0x30 [nouveau] >> [ 2296.864175] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] >> [ 2296.864189] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] >> [ 2417.699641] Workqueue: events_unbound nv50_disp_atomic...

A cleanup of nouveau_dma_wait(): extract a sub-function and eliminate two variables to improve readability. No functional changes. Signed-off-by: Pekka Paalanen <pq at iki.fi> --- drivers/gpu/drm/nouveau/nouveau_dma.c | 72 ++++++++++++++++++--------------- 1 files changed, 39 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c

...be write-cached results in the following happening when >>>>>> trying to run any program on Tegra/GK20A: >>>>>> >>>>>> Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 >>>>>> ... >>>>>> (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) >>>>>> (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) >>>>>> (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) >>>>>> (ttm_bo_wait) from...

...] ? nvkm_ioctl_ntfy_get+0x69/0xb0 [nouveau] > [ 2296.864032] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] > [ 2296.864047] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] > [ 2296.864118] Workqueue: events_unbound nv50_disp_atomic_commit_work > [nouveau] > [ 2296.864138] ? nouveau_bo_rd32+0x2a/0x30 [nouveau] > [ 2296.864153] ? nv84_fence_read+0x2e/0x30 [nouveau] > [ 2296.864175] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] > [ 2296.864189] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] > [ 2417.699641] Workqueue: events_unbound nv50_disp_atomic_commit_work &gt...

...vers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index d59ffc4..442bab7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -172,6 +172,29 @@ nouveau_bo_unmap(struct nouveau_bo *nvbo) ttm_bo_kunmap(&nvbo->kmap); } +u32 +nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index) +{ + bool is_iomem; + u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem); + mem = &mem[index]; + if (is_iomem) + return ioread32_native((void __force __iomem *)mem); + else + return *mem; +} + +void +nouveau_bo_wr32(struct nouveau_bo *n...

...and > why this is needed and what a more suitable solution could be. > > Allowing BOs to be write-cached results in the following happening when > trying to run any program on Tegra/GK20A: > > Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 > ... > (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) > (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) > (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) > (ttm_bo_wait) from [<c035e334>] (nouveau_gem_ioctl_cpu_prep+0x44/0x100)...

...could be. > >> > >> Allowing BOs to be write-cached results in the following happening when > >> trying to run any program on Tegra/GK20A: > >> > >> Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 > >> ... > >> (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) > >> (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) > >> (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) > >> (ttm_bo_wait) from [<c035e334>] (nouveau_gem_...

...ng BOs to be write-cached results in the following happening when > >> >> trying to run any program on Tegra/GK20A: > >> >> > >> >> Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 > >> >> ... > >> >> (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) > >> >> (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) > >> >> (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) > >> >> (ttm_bo_wait) from [<...

...> >> [ 2296.864032] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] > >> [ 2296.864047] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] > >> [ 2296.864118] Workqueue: events_unbound nv50_disp_atomic_commit_work > >> [nouveau] > >> [ 2296.864138] ? nouveau_bo_rd32+0x2a/0x30 [nouveau] > >> [ 2296.864153] ? nv84_fence_read+0x2e/0x30 [nouveau] > >> [ 2296.864175] nv50_disp_atomic_commit_tail+0x55/0x3a00 [nouveau] > >> [ 2296.864189] nv50_disp_atomic_commit_work+0x12/0x20 [nouveau] > >> [ 2417.699641] Workqueue: events_unbo...

Revised patch set v2. [PATCH 1/8] drm/nouveau: bo read/write wrappers for nv04_crtc.c [PATCH 2/8] drm/nouveau: use bo accessors for push buffers [PATCH 3/8] drm/nouveau: OUT_RINGp - optimize OUT_RING loops [PATCH 4/8] drm/nv50: proper notifier_bo access in nv50_display_vblank_crtc_handler() [PATCH 5/8] drm/nouveau: access fbcon notifier via bo accessors [PATCH 6/8] drm/nouveau: screen_base and

...nouveau_bo_vma_del(bo, &fctx->dispc_vma[i]); @@ -168,7 +171,7 @@ nv84_fence_context_new(struct nouveau_channel *chan) ret = nouveau_bo_vma_add(bo, client->vm, &fctx->dispc_vma[i]); } - nouveau_bo_wr32(priv->bo, fifo->chid * 16/4, 0x00000000); + fctx->base.sequence = nouveau_bo_rd32(priv->bo, fifo->chid * 16/4); if (ret) nv84_fence_context_del(chan); -- 1.8.3.4

...n the following happening when > >>>>>> trying to run any program on Tegra/GK20A: > >>>>>> > >>>>>> Unhandled fault: external abort on non-linefetch (0x1008) at 0xf0036010 > >>>>>> ... > >>>>>> (nouveau_bo_rd32) from [<c0357d00>] (nouveau_fence_update+0x5c/0x80) > >>>>>> (nouveau_fence_update) from [<c0357d40>] (nouveau_fence_done+0x1c/0x38) > >>>>>> (nouveau_fence_done) from [<c02c3d00>] (ttm_bo_wait+0xec/0x168) > >>>>>> (tt...

This is mainly for dropping interlaced modes on DP connectors if the GPU would otherwise display garbage or EVO timesout. It also adds experimental detection of the HDMI clock limit we currently hard limit depending on the GPU generation. Starting with GF110 GPUs, we can retrieve the limit directly from the GPU and may make the hdmimhz parameter obsolete. Testing this series with 2560x1440 or

small update to my last version I sent out. Patches 3-6 are optional and should only improve detecting the max clocks for HDMI and DP, but they didn't underwent big testing and I am a bit concerned, that it might break detecting the DP limits on some boards. Karol Herbst (6): kms/nv50: move nv50_mstm out of the dp union in nouveau_encoder kms/nv50: reject interlaced modes if the hardware