search for: nouveau_bo_placement_set

...418d881 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -153,7 +153,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, nvbo->placement.fpfn = 0; nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0; - nouveau_bo_placement_set(nvbo, flags); + nouveau_bo_placement_set(nvbo, flags, 0); nvbo->channel = chan; ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size, @@ -172,26 +172,33 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, return 0; } +static void +set_placement_list...

...u/drm/nouveau/nouveau_bo.c index 028719f..0266124 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -439,8 +439,7 @@ nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl) switch (bo->mem.mem_type) { case TTM_PL_VRAM: - nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT | - TTM_PL_FLAG_SYSTEM); + nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT); break; default: nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM); -- 1.6.4.4

...;bo.mem.num_pages = size >> PAGE_SHIFT; > + > + if (tile_flags & NOUVEAU_GEM_TILE_WCUS) > + nvbo->valid_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC; > + else > + nvbo->valid_caching = TTM_PL_MASK_CACHING; > + > nouveau_bo_placement_set(nvbo, flags, 0); > > acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size, > @@ -292,7 +298,7 @@ void > nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy) > { > struct ttm_placement *pl = &nvbo->placement; > - ui...

...ign, nouveau_bo_fixup_align(nvbo, flags, &align, &size); nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; + + if (tile_flags & NOUVEAU_GEM_TILE_WCUS) + nvbo->valid_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC; + else + nvbo->valid_caching = TTM_PL_MASK_CACHING; + nouveau_bo_placement_set(nvbo, flags, 0); acc_size = ttm_bo_dma_acc_size(&drm->ttm.bdev, size, @@ -292,7 +298,7 @@ void nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy) { struct ttm_placement *pl = &nvbo->placement; - uint32_t flags = TTM_PL_MASK_CACHING | + uint32_t fla...

..._device(drm->device)->card_type < NV_50 || - !nouveau_bo_tile_layout(nvbo)) - return 0; - } - - /* make sure bo is in mappable vram */ - if (bo->mem.start + bo->mem.num_pages < mappable) - return 0; - - - nvbo->placement.fpfn = 0; - nvbo->placement.lpfn = mappable; - nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0); - return nouveau_bo_validate(nvbo, false, false); -} - -static int nouveau_ttm_tt_populate(struct ttm_tt *ttm) { struct ttm_dma_tt *ttm_dma = (void *)ttm; @@ -1524,7 +1496,6 @@ struct ttm_bo_driver nouveau_bo_driver = { .sync_obj_flush = nouveau_bo_fence_flush, ....

This is the first set of patches to make Nouveau work on Tegra. Those are only the obvious correctness fixes, a lot of optimization work remains to be done, but at least it's enough to get accel working and let the machine survive a piglit run. A new BO flag is introduced to allow userspace to hint the kernel about possible optimizations. Lucas Stach (6): drm/ttm: recognize ARM arch in

...c index ee02cd833c5e..84a36fe7c37d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_uvmm.c +++ b/drivers/gpu/drm/nouveau/nouveau_uvmm.c @@ -1803,6 +1803,7 @@ nouveau_uvmm_bo_validate(struct drm_gpuvm_bo *vm_bo, struct drm_exec *exec) { struct nouveau_bo *nvbo = nouveau_gem_object(vm_bo->obj); + nouveau_bo_placement_set(nvbo, nvbo->valid_domains, 0); return nouveau_bo_validate(nvbo, true, false); } -- 2.45.0

...n 0; > - } > - > - /* make sure bo is in mappable vram */ > - if (bo->mem.start + bo->mem.num_pages < mappable) > - return 0; > - > - > - nvbo->placement.fpfn = 0; > - nvbo->placement.lpfn = mappable; > - nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_VRAM, 0); > - return nouveau_bo_validate(nvbo, false, false); > -} > - > -static int > nouveau_ttm_tt_populate(struct ttm_tt *ttm) > { > struct ttm_dma_tt *ttm_dma = (void *)ttm; > @@ -1524,7 +1496,6 @@ struct ttm_bo_driver nouveau_bo_driver...

...vmm->lpg_shift; } - nouveau_bo_fixup_align(nvbo, flags, &align, &size); + if (size <= 0) { + nv_warn(drm, "invalid size %x after setting alignment %x\n", + size, align); + kfree(nvbo); + return -EINVAL; + } + nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; nouveau_bo_placement_set(nvbo, flags, 0); -- 1.8.4

...au_bo.c b/drm/nouveau_bo.c index 3d474ac03f88..9a8adeec80cd 100644 --- a/drm/nouveau_bo.c +++ b/drm/nouveau_bo.c @@ -323,8 +323,8 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) goto out; } - if (nvbo->pin_refcnt++) - goto out; + if (nvbo->pin_refcnt) + goto ref_inc; nouveau_bo_placement_set(nvbo, memtype, 0); @@ -341,6 +341,10 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) break; } } + +ref_inc: + nvbo->pin_refcnt++; + out: ttm_bo_unreserve(bo); return ret; @@ -1184,6 +1188,9 @@ nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr, str...

...tiled, we've got * nothing to do here. @@ -1332,10 +1336,20 @@ nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo) if (nv_device(drm->device)->card_type < NV_50 || !nouveau_bo_tile_layout(nvbo)) return 0; + + if (bo->mem.mem_type == TTM_PL_SYSTEM) { + nouveau_bo_placement_set(nvbo, TTM_PL_TT, 0); + + ret = nouveau_bo_validate(nvbo, false, false); + if (ret) + return ret; + } + return 0; } /* make sure bo is in mappable vram */ - if (bo->mem.start + bo->mem.num_pages < mappable) + if (nv_device(drm->device)->card_type >= NV_50 || + bo...

...nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags, size_t acc_size; int ret; - acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo)); - - nouveau_bo_fixup_align(nvbo, flags, &align, &size); nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; nouveau_bo_placement_set(nvbo, flags, 0); + acc_size = ttm_bo_dma_acc_size(nvbo->bo.bdev, size, sizeof(*nvbo)); + ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type, &nvbo->placement, align >> PAGE_SHIFT, false, acc_size, sg, robj, nouveau_bo_del_ttm); @@ -318,7 +319,8 @@ nouve...

...0); > + nouveau_bo_del_io_reserve_lru(bo); > nv10_bo_put_tile_region(dev, nvbo->tile, NULL); > > /* > @@ -304,6 +305,7 @@ nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags, > > nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; > nouveau_bo_placement_set(nvbo, flags, 0); > + INIT_LIST_HEAD(&nvbo->io_reserve_lru); > > ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type, > &nvbo->placement, align >> PAGE_SHIFT, false, > @@ -574,6 +576,26 @@ nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo) &...

...veau_bo_del_io_reserve_lru(bo); > nv10_bo_put_tile_region(dev, nvbo->tile, NULL); > > /* > @@ -304,6 +305,7 @@ nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags, > > nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; > nouveau_bo_placement_set(nvbo, flags, 0); > + INIT_LIST_HEAD(&nvbo->io_reserve_lru); > > ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type, > &nvbo->placement, align >> PAGE_SHIFT, false, > @@ -574,6 +576,26 @@ nouveau_bo_sync_for_cpu...

Hi guys, I've already send this out in September last year, but only got a response from Daniel. Could you guys please test this and tell me what you think about it? Basically I'm trying to remove all driver specific features from TTM which don't need to be inside the framework. Thanks, Christian.

..._bo(bo); WARN_ON(nvbo->pin_refcnt > 0); + nouveau_bo_del_io_reserve_lru(bo); nv10_bo_put_tile_region(dev, nvbo->tile, NULL); /* @@ -304,6 +305,7 @@ nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags, nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; nouveau_bo_placement_set(nvbo, flags, 0); + INIT_LIST_HEAD(&nvbo->io_reserve_lru); ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type, &nvbo->placement, align >> PAGE_SHIFT, false, @@ -574,6 +576,26 @@ nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo) PAGE_SIZE, DMA_FROM_DEV...

..._bo(bo); WARN_ON(nvbo->pin_refcnt > 0); + nouveau_bo_del_io_reserve_lru(bo); nv10_bo_put_tile_region(dev, nvbo->tile, NULL); /* @@ -304,6 +305,7 @@ nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags, nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; nouveau_bo_placement_set(nvbo, flags, 0); + INIT_LIST_HEAD(&nvbo->io_reserve_lru); ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type, &nvbo->placement, align >> PAGE_SHIFT, false, @@ -574,6 +576,26 @@ nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo) PAGE_SIZE, DMA_FROM_DEV...

...tile_region(dev, nvbo->tile, NULL); > kfree(nvbo); > } > @@ -297,6 +298,7 @@ nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 flags, > nouveau_bo_fixup_align(nvbo, flags, &align, &size); > nvbo->bo.mem.num_pages = size >> PAGE_SHIFT; > nouveau_bo_placement_set(nvbo, flags, 0); > + INIT_LIST_HEAD(&nvbo->io_reserve_lru); > > ret = ttm_bo_init(nvbo->bo.bdev, &nvbo->bo, size, type, > &nvbo->placement, align >> PAGE_SHIFT, false, > @@ -566,6 +568,26 @@ nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo) >...

From: Maarten Lankhorst <maarten.lankhorst at canonical.com> Commit de7b7d59d54852c introduced tiled GART, but a linear copy is still performed. This may result in errors on eviction, fix it by checking tiling from memtype. Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com> Cc: stable at vger.kernel.org #3.10+ --- drivers/gpu/drm/nouveau/nouveau_bo.c | 33

On Wed, Aug 21, 2019 at 04:33:58PM +1000, Ben Skeggs wrote: > On Wed, 14 Aug 2019 at 20:14, Gerd Hoffmann <kraxel at redhat.com> wrote: > > > > Hi, > > > > > > Changing the order doesn't look hard. Patch attached (untested, have no > > > > test hardware). But maybe I missed some detail ... > > > > > > I came up with