search for: myintrinsics

Chris, Thanks for the suggestions. On 8/22/05, Chris Lattner <sabre at nondot.org> wrote: > On Fri, 19 Aug 2005, Michael McCracken wrote: > > > I've been thinking of adding an instruction, and I'm following the > > advice in the docs to consult the list before doing something rash. > > Always a good idea! :) Instead of adding an instruction, I'd

On Tue, 23 Aug 2005, Michael McCracken wrote: >> Okay... this is tricky. Anything that will bind to variables will >> prevent modification to the variable. > > I see - so if I wanted to use my earlier approach, I'd need to change every > optimization and analysis to treat the 'marker' instructions specially as > instructions that don't modify their

On 8/23/05, Chris Lattner <sabre at nondot.org> wrote: > On Tue, 23 Aug 2005, Michael McCracken wrote: > >> Okay... this is tricky. Anything that will bind to variables will > >> prevent modification to the variable. > > > > I see - so if I wanted to use my earlier approach, I'd need to change every > > optimization and analysis to treat the

Hi, I will try to explain by giving an example. Let's say that I have an intrinsic: int llvm.myintrinsic(int) I have a function: int myintrinsic_handler(int) When %var = call int %llvm.myintrinsic( int %arg ) is met in the code, I want the code generator put in its place: a call to function "myintrinsic_handler" (i.e. %var = call int %myintrinsic_handler( int %arg ) ) or

...], [IntrNoMem, Commutative]>; def int_x86_sse2_add_sd : GCCBuiltin<"__builtin_ia32_addsd">, Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_v2f64_ty], [IntrNoMem, Commutative]>; Untested multiclass! Look for SOME_CONCAT. multiclass myintrinsics<bits<8> opc, string OpcodeStr, Intrinsic Intr> { // Scalar intrinsics def SSrr_Int SSI<opc, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32: $src2), !strconcat(OpcodeStr, "ss\t{$src2, $dst|$dst, $src2}"), [(set FR32:$dst, (SOME_CONC...

On Fri, 19 Aug 2005, Michael McCracken wrote: > I've been thinking of adding an instruction, and I'm following the > advice in the docs to consult the list before doing something rash. Always a good idea! :) Instead of adding an instruction, I'd suggest adding an intrinsic. You can mark intrinsics as not reading/writing to memory (see lib/Analysis/BasicAliasAnalysis.cpp for

call void @llvm.branchlike(label %thelabel) Is it possible to give a label/BasicBlock* to an intrinsic? Similar to labels for branches. No label type is currently defined in Intrinsics.td, but would it be possible to add it there and ValueTypes.td? But I also want to take the address and put it into a physical register and emit a desired x86 instruction. Assuming I have the label, I should be

I've been thinking of adding an instruction, and I'm following the advice in the docs to consult the list before doing something rash. What I want to do is provide a way to identify variable names and source locations that doesn't affect the effectiveness of optimizations. This is not the same problem as supporting debug info, because I don't care about being able to look up

Matt, The added intrinsic in DAG looks like: 0xbedb698: i32 = llvm.MyIntrinsic 0xbedb200, 0xbedac18 [ORD=4] The builtin in DAG looks like: 0xbedb2a8: i32,ch = llvm 0xbedb158:1, 0xbedb200, 0xbedb158 [ORD=7] [ID=16] The only difference I'm seeing is the extra operand, which is a 'ch' from a load. On Tue, Feb 2, 2016 at 3:55 PM, Matt Arsenault <arsenm2 at gmail.com>

On Sat, 31 Mar 2007, Ferad Zyulkyarov wrote: > I will try to explain by giving an example. > Let's say that I have an intrinsic: int llvm.myintrinsic(int) > I have a function: int myintrinsic_handler(int) > When > %var = call int %llvm.myintrinsic( int %arg ) > is met in the code, I want the code generator put in its place: a call > to function >

Is there a way to implement an intrinsic that looks like a conditional branch so that it has 2 edges to 2 basic blocks? Taking a step back, I'm trying to make a special branch where Passes treat it just like a regular conditional branch except that it's condition is opaque to everyone, so it isn't removed by optimizations. Additionally, the special branch would codegen (to x86) to

On Mon, 14 Apr 2008, Edward Lee wrote: > Is there a way to implement an intrinsic that looks like a conditional > branch so that it has 2 edges to 2 basic blocks? No. All control flow operators must be terminator instructions. > Taking a step back, I'm trying to make a special branch where Passes > treat it just like a regular conditional branch except that it's >

On Mon, Apr 14, 2008 at 5:11 PM, Chris Lattner <sabre at nondot.org> wrote: > Why not something like: > %x = llvm.myintrinsic() > br i1 %x, label %T, label %F Right. That's exactly what I meant in the last paragraph of the original message. The reason for not wanting this is that %x actually always turns out to be 1 (on architectures that support it), so %T is always

On Sat, 2007-03-31 at 12:38 -0800, Chris Lattner wrote: > >> 3. Can I introduce an intrinsic that is actually a call to my function > >> that implements the logic? I suppose it is possible but unfortunately > >> I couldn't figure it out. For example, in GCC we can write an > >> intrinsic that translates to a C code. > > > > As part of PR1297

The intrinsic ID is an int, not a float. —escha > On Jun 24, 2016, at 7:49 AM, Ryan Taylor via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > given the following C code: > > float b=16, a=0; > int main() { > float a = sqrt(b); > return0; > } > > I'm trying to lower FSQRT down, but getting a casting issue, my code is: > > SDValue

On Mar 23, 2009, at 5:56 PM, David Greene wrote: > Is it legal to do something like a !strconcat on a non-string > entity? That > is, is there some operation that will let me do this (replace > SOME_CONCAT with > an appropriate operator): I don't get it, can you try a simpler example on me? :) -Chris > > > (WARNING! Hacked-up tablegen ahead!) > >

I've tried all the types (both for result and Intrinsic ID), can't seem to find what cast is causing the issue here. On Fri, Jun 24, 2016 at 11:47 AM, Ryan Taylor <ryta1203 at gmail.com> wrote: > That's what I thought but I got the same error with: > > DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, VT, > DAG.getTargetConstant(Intrinsic::my_intrinsic, DL, MVT::i16), LHS);

>> 3. Can I introduce an intrinsic that is actually a call to my function >> that implements the logic? I suppose it is possible but unfortunately >> I couldn't figure it out. For example, in GCC we can write an >> intrinsic that translates to a C code. > > As part of PR1297 (http://llvm.org/PR1297) I am about to make this > happen. There are certain kinds of

Is it legal to do something like a !strconcat on a non-string entity? That is, is there some operation that will let me do this (replace SOME_CONCAT with an appropriate operator): (WARNING! Hacked-up tablegen ahead!) multiclass sse_fp_binop_bitwise_rm<bits<8> opc, string OpcodeStr, SDNode OpNode> { // Vector operation emulating scalar (fp)

I am working on an implementation that needs to add a couple of overloaded intrinsics (based on pointer to different address spaces). I am creating a new myintrinsics.td file and using the iPTRAny for the argument type. The current interface (i.e. getName() and getTyp() in Intrinsics.h) seems to require the caller to know which arguments are used for overloading, so to set Tys and numTys. This means I need to hardcode the intrinsic property in the caller, which...