Displaying 11 results from an estimated 11 matches for "mul4".
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2012 Nov 05
1
[LLVMdev] Getting unique instruction identifier ( Insturction.h)
Hi All,
The following IR has "mul4". I am wondering if "4 " is generated by SSA ?
Also is there any method that gives me "mul4". I tried getOpcode and getOpcodeName but they are for different purposes.
%mul4 = mul i32 %e0, %ai3
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2013 Jul 25
2
[LLVMdev] Passing String to an external function in llvm
Thanx for the response.
%x = alloca i32, align 4
%y = alloca i32, align 4
%a = alloca i32, align 4
%t = alloca i32, align 4
1. %10 = load i32* %x, align 4
2. %11 = load i32* %y, align 4
3. %div = sdiv i32 %10, %11
4. %12 = load i32* %a, align 4
5. %mul4 = mul nsw i32 %div, %12
6. store i32 %mul4, i32* %t, align 4
a. %mul4 = mul nsw i32 %div, %12
b. %div = sdiv i32 %10, %11
c. %10 = load i32* %x, align 4
d. %11 = load i32* %y, align 4
e. %12 = load i32* %a, align 4
This is a IR of " t = x/y*a "
The address of the &...
2013 Jul 25
0
[LLVMdev] Passing String to an external function in llvm
On Thu, Jul 25, 2013 at 10:12 AM, Abhinash Jain <omnia at mailinator.com> wrote:
> I did some computation through llvm pass, and store those computed values on
> string. eg. :-
>
> stringstream lhs;
> lhs << instr->getOperand(1); // 'instr' is some instruction
> string lhsvar=lhs.str();
>
> Now I want to pass this 'lhsvar' to the external
2013 Jul 25
2
[LLVMdev] Passing String to an external function in llvm
I did some computation through llvm pass, and store those computed values on
string. eg. :-
stringstream lhs;
lhs << instr->getOperand(1); // 'instr' is some instruction
string lhsvar=lhs.str();
Now I want to pass this 'lhsvar' to the external function, so how can i do
this???
This is just the part of a code to make you understand. if you say I can
even provide the
2013 Jul 25
0
[LLVMdev] Passing String to an external function in llvm
...r the response.
>
> %x = alloca i32, align 4
> %y = alloca i32, align 4
> %a = alloca i32, align 4
> %t = alloca i32, align 4
>
> 1. %10 = load i32* %x, align 4
> 2. %11 = load i32* %y, align 4
> 3. %div = sdiv i32 %10, %11
> 4. %12 = load i32* %a, align 4
> 5. %mul4 = mul nsw i32 %div, %12
>
> 6. store i32 %mul4, i32* %t, align 4
> a. %mul4 = mul nsw i32 %div, %12
> b. %div = sdiv i32 %10, %11
> c. %10 = load i32* %x, align 4
> d. %11 = load i32* %y, align 4
> e. %1...
2017 Mar 15
2
Data structure improvement for the SLP vectorizer
...e, double* %data3
%load31 = load double, double* %element31
%load32 = load double, double* %element32
%load33 = load double, double* %element33
%mul1 = fmul fast double %load20, %load10
%mul2 = fmul fast double %load21, %load11
%mul3 = fmul fast double %load22, %load10
%mul4 = fmul fast double %load23, %load11
%add1 = fadd fast double %load30, %mul1
%add2 = fadd fast double %load31, %mul2
%add3 = fadd fast double %load32, %mul3
%add4 = fadd fast double %load33, %mul4
%out0 = getelementptr inbounds double, double* %out, i32 0
%out1 = getelement...
2013 Nov 11
2
[LLVMdev] What's the Alias Analysis does clang use ?
..., align 4
store float %6, float* %y, align 4
%7 = load float* %arrayidx2, align 4
store float %7, float* %z, align 4
%8 = load float* %x, align 4
%conv = fpext float %8 to double
%mul = fmul double %conv, 6.700000e-01
%9 = load float* %y, align 4
%conv3 = fpext float %9 to double
%mul4 = fmul double %conv3, 1.700000e-01
%add = fadd double %mul, %mul4
%10 = load float* %z, align 4
%conv5 = fpext float %10 to double
%mul6 = fmul double %conv5, 1.600000e-01
%add7 = fadd double %add, %mul6
%conv8 = fptrunc double %add7 to float
store float %conv8, float* %res, align 4...
2013 Nov 12
0
[LLVMdev] What's the Alias Analysis does clang use ?
...%6, float* %y, align 4
> %7 = load float* %arrayidx2, align 4
> store float %7, float* %z, align 4
> %8 = load float* %x, align 4
> %conv = fpext float %8 to double
> %mul = fmul double %conv, 6.700000e-01
> %9 = load float* %y, align 4
> %conv3 = fpext float %9 to double
> %mul4 = fmul double %conv3, 1.700000e-01
> %add = fadd double %mul, %mul4
> %10 = load float* %z, align 4
> %conv5 = fpext float %10 to double
> %mul6 = fmul double %conv5, 1.600000e-01
> %add7 = fadd double %add, %mul6
> %conv8 = fptrunc double %add7 to float
> store float %conv8, f...
2012 Jul 15
0
[LLVMdev] Issue with Machine Verifier and earlyclobber
...0
%add = fadd float %mul, 0x40718776A0000000
%mul1 = fmul float %days, 0x3FEF8A09A0000000
%add2 = fadd float %mul1, 0x4076587740000000
%mul3 = fmul float %days, 0x3E81B35CC0000000
%sub = fsub float 0x3FFEA235C0000000, %mul3
%call = tail call float @dsin(float %add2) nounwind readnone
%mul4 = fmul float %sub, %call
%mul5 = fmul float %days, 0x3E27C04CA0000000
%sub6 = fsub float 0x3F94790B80000000, %mul5
%mul7 = fmul float %add2, 2.000000e+00
%call8 = tail call float @dsin(float %mul7) nounwind readnone
%mul9 = fmul float %sub6, %call8
%add10 = fadd float %mul4, %mul9
%ad...
2012 Jul 15
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
On Jul 15, 2012, at 9:20 AM, Borja Ferrer <borja.ferav at gmail.com> wrote:
> Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called.
>
> 2012/7/14 Borja Ferrer <borja.ferav at gmail.com>
> Hello Jakob,
>
> I'm still getting the error, I can give you any other
2017 Mar 15
2
Data structure improvement for the SLP vectorizer
There was some discussion of this on the llvm-commits list, but I
wanted to raise the topic for discussion here. The background of the
-commits discussion was that r296863 added the ability to sort memory
access when the SLP vectorizer reached a load (the SLP vectorizer
starts at a store or some other sink, and tries to go up the tree
vectorizing as it goes along - if the input is in a different