search for: mul3

Displaying 11 results from an estimated 11 matches for "mul3".

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2017 Mar 15
2
Data structure improvement for the SLP vectorizer
...double* %data3, i32 3 %load30 = load double, double* %data3 %load31 = load double, double* %element31 %load32 = load double, double* %element32 %load33 = load double, double* %element33 %mul1 = fmul fast double %load20, %load10 %mul2 = fmul fast double %load21, %load11 %mul3 = fmul fast double %load22, %load10 %mul4 = fmul fast double %load23, %load11 %add1 = fadd fast double %load30, %mul1 %add2 = fadd fast double %load31, %mul2 %add3 = fadd fast double %load32, %mul3 %add4 = fadd fast double %load33, %mul4 %out0 = getelementptr inbounds doub...
2014 Oct 16
2
[LLVMdev] RFC: Should we have (something like) -extra-vectorizer-passes in -O2?
----- Original Message ----- > From: "Chandler Carruth" <chandlerc at google.com> > To: "Zinovy Nis" <zinovy.nis at gmail.com> > Cc: "Hal Finkel" <hfinkel at anl.gov>, "James Molloy" <james at jamesmolloy.co.uk>, "LLVM Developers Mailing List" > <llvmdev at cs.uiuc.edu> > Sent: Thursday, October 16, 2014
2012 Feb 17
0
[LLVMdev] Folding an insertelt chain
On Feb 17, 2012, at 12:50 AM, Ivan Llopard wrote: > Hello, > > I've added a little combining operation in DAGCombiner to fold a chain of insertelt nodes if that chain is proved to fully overwrite the very first source vector. In which case, I supposed a build_vector is better. It seems to be safe but I don't know if it is correctly implemented or if it is already done somewhere
2012 Feb 17
3
[LLVMdev] Folding an insertelt chain
Hello, I've added a little combining operation in DAGCombiner to fold a chain of insertelt nodes if that chain is proved to fully overwrite the very first source vector. In which case, I supposed a build_vector is better. It seems to be safe but I don't know if it is correctly implemented or if it is already done somewhere else. Please find attached the patch. Regards, Ivan
2012 Jul 15
0
[LLVMdev] Issue with Machine Verifier and earlyclobber
...ot; target triple = "armv4t-generic-generic" define float @f3(float %days) nounwind readnone { entry: %mul = fmul float %days, 0x3FEF8A6C60000000 %add = fadd float %mul, 0x40718776A0000000 %mul1 = fmul float %days, 0x3FEF8A09A0000000 %add2 = fadd float %mul1, 0x4076587740000000 %mul3 = fmul float %days, 0x3E81B35CC0000000 %sub = fsub float 0x3FFEA235C0000000, %mul3 %call = tail call float @dsin(float %add2) nounwind readnone %mul4 = fmul float %sub, %call %mul5 = fmul float %days, 0x3E27C04CA0000000 %sub6 = fsub float 0x3F94790B80000000, %mul5 %mul7 = fmul float %ad...
2012 Jul 15
2
[LLVMdev] Issue with Machine Verifier and earlyclobber
On Jul 15, 2012, at 9:20 AM, Borja Ferrer <borja.ferav at gmail.com> wrote: > Jakob, one more hint, I've placed some asserts around the code you added and noticed that the InlineSpiller::insertReload() function is not being called. > > 2012/7/14 Borja Ferrer <borja.ferav at gmail.com> > Hello Jakob, > > I'm still getting the error, I can give you any other
2017 Mar 15
2
Data structure improvement for the SLP vectorizer
There was some discussion of this on the llvm-commits list, but I wanted to raise the topic for discussion here. The background of the -commits discussion was that r296863 added the ability to sort memory access when the SLP vectorizer reached a load (the SLP vectorizer starts at a store or some other sink, and tries to go up the tree vectorizing as it goes along - if the input is in a different
2014 Feb 23
6
realtime backup with LDA?
Hello everyone, i was reading the dovecot-lda documentation as i'm using LDA as a delivery agent on my current mailserver configuration. I was curious to know if there are some options for having a message to be delivered to a "twin mailbox" upon delivery. this twin mailbox would work as a backup archive for recovering emails in case the user accidentally deletes them. so if i have
2014 Feb 24
1
realtime backup with LDA?
...anxSYiPqm3fhi9Ruax2QDulaOkDrm9CgGQrl+Q2lJqzaJD GQhowSzHi2fXswjTES4lAoMxB1JcvS7f9tEmVS2+xcv6ptVtro4HUcMC9ho39AvS mKnyx8NP+sy8Cp5CU7gTaLGaDR5pVpGS1CHu7ijQj8P0nRceP4jHo4p2yrxUbsMs lool4VVBnWLIhbgkKwoxYUF9ydnVSLMQ3dXnTgQIjAQTsRc5FvID1kuKbN5rLZGw CaOCc+kM33bYCk2++KwlDCpeFH8pOrayQFzDKPequN8TWkUm/sidKQ== =mul3 -----END PGP SIGNATURE-----
2012 Nov 11
2
[LLVMdev] problem trying to write an LLVM register-allocation pass
Hi Susan, It looks like the bitcode you have attached is corrupted. You should make sure to attach it as a binary file. Alternatively you can attach the LLVM assembly as text. You can generate an assembly file from bitcode with: llvm-dis -o <asm file> <bitcode> Regards, Lang. On Fri, Nov 9, 2012 at 11:15 AM, Susan Horwitz <horwitz at cs.wisc.edu> wrote: > Thanks Lang,
2012 Nov 11
0
[LLVMdev] problem trying to write an LLVM register-allocation pass
...000 br label %while.cond while.end: ; preds = %while.cond %call2 = call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([7 x i8]* @.str, i32 0, i32 0), i32 %x.0) %add = add nsw i32 %x.0, 5 %mul = mul nsw i32 %x.0, 2 %sub = sub nsw i32 %mul, 1 %mul3 = mul nsw i32 %add, %sub %add4 = add nsw i32 %x.0, %mul3 %div5 = sdiv i32 %add4, %x.0 %add6 = add nsw i32 5, %add %sub7 = sub nsw i32 %div5, %add6 %add8 = add nsw i32 %add4, %sub7 %add9 = add nsw i32 %add8, %x.0 %add10 = add nsw i32 %add9, %add %add11 = add nsw i32 %add10, %sub %c...