search for: msr_efer

Hi! Attached patch moves SVM and VMX specific MSR_EFER handling into hvm as neither SVM nor VMX do anything arch specific things. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, A...

...pu_has_lmsl && (value & EFER_LMSLE)) || (!cpu_has_ffxsr && (value & EFER_FFXSE)) || ((value & (EFER_LME|EFER_LMA)) == EFER_LMA)); } @@ -641,7 +642,8 @@ static int hvm_load_cpu_ctxt(struct doma } if ( !hvm_efer_valid( - ctxt.msr_efer, EFER_FFXSE | EFER_LME | EFER_LMA | EFER_NX | EFER_SCE) ) + ctxt.msr_efer, + EFER_FFXSE | EFER_LMSLE | EFER_LME | EFER_LMA | EFER_NX | EFER_SCE) ) { gdprintk(XENLOG_ERR, "HVM restore: bad EFER 0x%"PRIx64"\n", ctxt.msr_efer); @@ -995,...

...This however is. diff --git a/efi/x86_64/linux.S b/efi/x86_64/linux.S index 0a0e996..972c0b2 100644 --- a/efi/x86_64/linux.S +++ b/efi/x86_64/linux.S @@ -10,8 +10,9 @@ * * ----------------------------------------------------------------------- */ -#define CR0_PG_FLAG 0x80000000 -#define MSR_EFER 0xc0000080 +#define CR0_PG_BIT 31 +#define CR4_PAE_BIT 5 +#define MSR_EFER 0xc0000080 .globl kernel_jump .type kernel_jump, at function @@ -19,30 +20,50 @@ kernel_jump: cli - /* - * Setup our segment selector (0x10) and return address (%rdi) - * on the stac...

Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85609 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo, Andrew Bowd Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list

...ns(+), 20 deletions(-) diff --git a/efi/x86_64/linux.S b/efi/x86_64/linux.S index 0a0e996..972c0b2 100644 --- a/efi/x86_64/linux.S +++ b/efi/x86_64/linux.S @@ -10,8 +10,9 @@ * * ----------------------------------------------------------------------- */ -#define CR0_PG_FLAG 0x80000000 -#define MSR_EFER 0xc0000080 +#define CR0_PG_BIT 31 +#define CR4_PAE_BIT 5 +#define MSR_EFER 0xc0000080 .globl kernel_jump .type kernel_jump, at function @@ -19,30 +20,50 @@ kernel_jump: cli - /* - * Setup our segment selector (0x10) and return address (%rdi) - * on the stack in preparation for...

...state */ static void *root_vmcb[NR_CPUS] __read_mostly; +#ifdef __x86_64__ +/* indicate whether guest may use EFER.LMSLE */ +static unsigned char cpu_has_lmsl = 1; +#endif + /* SVM feature flags */ u32 svm_feature_flags; @@ -190,7 +195,10 @@ static enum handler_return long_mode_do_ case MSR_EFER: /* Offending reserved bit will cause #GP. */ #ifdef __x86_64__ - if ( (msr_content & ~(EFER_LME | EFER_LMA | EFER_NX | EFER_SCE)) || + if ( (msr_content & ~(EFER_FFXSE | EFER_LMSLE | EFER_LME | EFER_LMA | + EFER_NX | EFER_SCE)) || +...

...12 +0200 @@ -2927,6 +2927,8 @@ int hvm_msr_write_intercept(unsigned int hvm_cpuid(1, &cpuid[0], &cpuid[1], &cpuid[2], &cpuid[3]); mtrr = !!(cpuid[3] & cpufeat_mask(X86_FEATURE_MTRR)); + hvm_memory_event_msr(msr, msr_content); + switch ( msr ) { case MSR_EFER: @@ -3857,6 +3859,7 @@ long do_hvm_op(unsigned long op, XEN_GUE case HVM_PARAM_MEMORY_EVENT_CR0: case HVM_PARAM_MEMORY_EVENT_CR3: case HVM_PARAM_MEMORY_EVENT_CR4: + case HVM_PARAM_MEMORY_EVENT_MSR: if ( d == current->domain )...

The patch enables x86_32 PAE unmodified guests on 64-bit Xen when the hvm feature is present. We tested only Linux at this point, and we''ll improve the functionality as we test other guests. The SVM needs the equivalent changes to the vmc.c to get this functionality working, but this patch does not break the build. Signed-off-by: Jun Nakajima <jun.nakajima@intel.com>

...as "x86_64-linux-gnu". For bug reporting instructions, please see: <http://www.gnu.org/software/gdb/bugs/>... Reading symbols from /root/xen-4.3.0/xen/xen-syms...done. (gdb) list *0xffff82c4c0186ae1 0xffff82c4c0186ae1 is in do_general_protection (traps.c:2597). 2592 case MSR_EFER: 2593 rdmsr_normal: 2594 /* Everyone can read the MSR space. */ 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR %p.\n", 2596 _p(regs->ecx));*/ 2597 if ( rdmsr_safe(regs->ecx, msr_content) ) 2598...

...h --- stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 2007-04-09 18:14:04.000000000 -0700 @@ -0,0 +1,270 @@ +#ifndef __ASM_MSR_INDEX_H +#define __ASM_MSR_INDEX_ H + +/* x86-64 specific MSRs */ +#define MSR_EFER 0xc0000080 /* extended feature register */ +#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ +#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ +#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ +#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */...

...h --- stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 2007-04-09 18:14:04.000000000 -0700 @@ -0,0 +1,270 @@ +#ifndef __ASM_MSR_INDEX_H +#define __ASM_MSR_INDEX_ H + +/* x86-64 specific MSRs */ +#define MSR_EFER 0xc0000080 /* extended feature register */ +#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ +#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ +#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ +#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */...

>>> On 20.05.14 at 18:25, <mike at estone.ca> wrote: > I've added iommu=debug to the XEN CMD Line under grub. > Attached is the xl dmesg log and system dmesg. Okay, this at least clarifies there is a (relatively big) RMRR. There is a change to the handling of these among the ones that'll become 4.3.3 - mind giving

...13 +0200 @@ -2927,6 +2927,8 @@ int hvm_msr_write_intercept(unsigned int hvm_cpuid(1, &cpuid[0], &cpuid[1], &cpuid[2], &cpuid[3]); mtrr = !!(cpuid[3] & cpufeat_mask(X86_FEATURE_MTRR)); + hvm_memory_event_msr(msr, msr_content); + switch ( msr ) { case MSR_EFER: @@ -3862,6 +3864,7 @@ long do_hvm_op(unsigned long op, XEN_GUE break; case HVM_PARAM_MEMORY_EVENT_INT3: case HVM_PARAM_MEMORY_EVENT_SINGLE_STEP: + case HVM_PARAM_MEMORY_EVENT_MSR: if ( d == current->domain )...

...t;. > For bug reporting instructions, please see: > <http://www.gnu.org/software/gdb/bugs/>... > Reading symbols from /root/xen-4.3.0/xen/xen-syms...done. > (gdb) list *0xffff82c4c0186ae1 > 0xffff82c4c0186ae1 is in do_general_protection (traps.c:2597). > 2592 case MSR_EFER: > 2593 rdmsr_normal: > 2594 /* Everyone can read the MSR space. */ > 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR > %p.\n", > 2596 _p(regs->ecx));*/ > 2597 if ( rdmsr_safe(regs-&g...

...* KVM introspection - x86 + * + * Copyright (C) 2019 Bitdefender S.R.L. + */ +#include "x86.h" +#include "../../../virt/kvm/kvmi_int.h" + +/* + * TODO: this can be done from userspace. + * - all these registers are sent with struct kvmi_event_arch + * - userspace can request MSR_EFER with KVMI_GET_REGISTERS + */ +static unsigned int kvmi_vcpu_mode(const struct kvm_vcpu *vcpu, + const struct kvm_sregs *sregs) +{ + unsigned int mode = 0; + + if (is_long_mode((struct kvm_vcpu *) vcpu)) { + if (sregs->cs.l) + mode = 8; + else if (!sregs->cs.db) + mode = 2; + else...

Ian Campbell <ijc at hellion.org.uk> writes: #What were the previous settings (the ones which worked for grub but not #Xen)? Do these new settings work with native Linux? # #Given the change in behaviour my gut feeling is that either the Legacy #USB Support option or the 60/64 emulation ones are the one which matters #out of that set. The default and previous settings were everything

....h --- stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 2007-04-10 10:31:45.000000000 -0700 @@ -0,0 +1,270 @@ +#ifndef __ASM_MSR_INDEX_H +#define __ASM_MSR_INDEX_H + +/* x86-64 specific MSRs */ +#define MSR_EFER 0xc0000080 /* extended feature register */ +#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ +#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ +#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ +#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */...

....h --- stock/linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 1969-12-31 16:00:00.000000000 -0800 +++ linux-2.6.21-rc6-mm1/include/asm-i386/msr-index.h 2007-04-10 10:31:45.000000000 -0700 @@ -0,0 +1,270 @@ +#ifndef __ASM_MSR_INDEX_H +#define __ASM_MSR_INDEX_H + +/* x86-64 specific MSRs */ +#define MSR_EFER 0xc0000080 /* extended feature register */ +#define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ +#define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ +#define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ +#define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */...

...ap.fs = 0; + ap.gs = 0; + + ap.eflags = 0; + +#ifdef CONFIG_X86_PAE + /* efer should match BSP efer. */ + if (cpu_has_nx) { + unsigned l, h; + rdmsr(MSR_EFER, l, h); + ap.efer = (unsigned long long) h << 32 | l; + } +#endif + + ap.cr3 = __pa(swapper_pg_dir); + /* Protected mode, paging, AM, WP, NE, MP. */ + ap.cr0 = 0x80050023; + ap.cr4 = mmu_cr4_feat...

...ap.fs = 0; + ap.gs = 0; + + ap.eflags = 0; + +#ifdef CONFIG_X86_PAE + /* efer should match BSP efer. */ + if (cpu_has_nx) { + unsigned l, h; + rdmsr(MSR_EFER, l, h); + ap.efer = (unsigned long long) h << 32 | l; + } +#endif + + ap.cr3 = __pa(swapper_pg_dir); + /* Protected mode, paging, AM, WP, NE, MP. */ + ap.cr0 = 0x80050023; + ap.cr4 = mmu_cr4_feat...