search for: msr_content

...================================================================= --- 2008-03-05.orig/xen/arch/x86/hvm/vmx/vmx.c 2008-02-26 10:43:52.000000000 +0100 +++ 2008-03-05/xen/arch/x86/hvm/vmx/vmx.c 2008-03-14 14:14:40.000000000 +0100 @@ -1512,8 +1512,10 @@ static int vmx_msr_read_intercept(struct msr_content = var_range_base[index]; break; case MSR_IA32_DEBUGCTLMSR: - if ( vmx_read_guest_msr(v, ecx, &msr_content) != 0 ) - msr_content = 0; + msr_content = __vmread(GUEST_IA32_DEBUGCTL); +#ifdef __i386__ + msr_content |= (u64)__vmread(GUEST_IA32_DEBUGCTL_H...

...t64_t tsc; @@ -277,6 +291,11 @@ return tsc + v->arch.hvm_vcpu.cache_tsc_offset; } +u64 hvm_get_guest_tsc_adjust(struct vcpu *v) +{ + return v->arch.hvm_vcpu.msr_tsc_adjust; +} + void hvm_migrate_timers(struct vcpu *v) { rtc_migrate_timers(v); @@ -2776,6 +2795,10 @@ *msr_content = hvm_get_guest_tsc(v); break; + case MSR_IA32_TSC_ADJUST: + *msr_content = hvm_get_guest_tsc_adjust(v); + break; + case MSR_TSC_AUX: *msr_content = hvm_msr_tsc_aux(v); break; @@ -2889,6 +2912,10 @@ hvm_set_guest_tsc(v, msr_content);...

Svm patch to add 32bit msr support (combined both 32bit with 64bit functions) and enable vlapic for 64bit. Applies cleanly to 9023. Please apply. Signed-off-by: Tom Woller <thomas.woller@amd.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

The first and third patches are cleaned up versions of an earlier v3 submission by Yang. 1: Nested VMX: check VMX capability before read VMX related MSRs 2: VMX: clean up capability checks 3: Nested VMX: fix IA32_VMX_CR4_FIXED1 msr emulation 4: x86: make hvm_cpuid() tolerate NULL pointers Signed-off-by: Jan Beulich <jbeulich@suse.com>

.../arch/x86/apic.c Mon Jan 17 18:05:52 2011 +0000 +++ b/xen/arch/x86/apic.c Wed Jan 19 03:24:16 2011 -0500 @@ -961,6 +961,22 @@ if ( !cpu_has_x2apic ) return; +#ifdef __i386__ + clear_bit(X86_FEATURE_X2APIC, boot_cpu_data.x86_capability); + if (x2apic_enabled) { + uint64_t msr_content; + + rdmsrl(MSR_IA32_APICBASE, msr_content); + msr_content &= ~(MSR_IA32_APICBASE_ENABLE | MSR_IA32_APICBASE_EXTD); + wrmsrl(MSR_IA32_APICBASE, msr_content); + msr_content |= MSR_IA32_APICBASE_ENABLE; + wrmsrl(MSR_IA32_APICBASE, msr_content); + x2apic_e...

...case MSR_EFER: 2593 rdmsr_normal: 2594 /* Everyone can read the MSR space. */ 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR %p.\n", 2596 _p(regs->ecx));*/ 2597 if ( rdmsr_safe(regs->ecx, msr_content) ) 2598 goto fail; 2599 regs->eax = (uint32_t)msr_content; 2600 regs->edx = (uint32_t)(msr_content >> 32); 2601 break; (gdb) quit root at xen-3:~# I am a noob when working with source code. How do I bump my xen up to 4.3....

Hi, testing for bounce mails. suddenly xen-devel started bouncing my mails back saying somebody forged by email to them ... :-( uh... if anybody gets this , please hit a reply privately. Thanks a ton ~psr -- --- pradeep singh rautela "Genius is 1% inspiration, and 99% perspiration" - not me :) _______________________________________________ Xen-devel mailing list

...guest may use EFER.LMSLE */ +static unsigned char cpu_has_lmsl = 1; +#endif + /* SVM feature flags */ u32 svm_feature_flags; @@ -190,7 +195,10 @@ static enum handler_return long_mode_do_ case MSR_EFER: /* Offending reserved bit will cause #GP. */ #ifdef __x86_64__ - if ( (msr_content & ~(EFER_LME | EFER_LMA | EFER_NX | EFER_SCE)) || + if ( (msr_content & ~(EFER_FFXSE | EFER_LMSLE | EFER_LME | EFER_LMA | + EFER_NX | EFER_SCE)) || + (!cpu_has_lmsl && (msr_content & EFER_LMSLE)) || + (!cpu_has_ffxsr &a...

Remove visibility of the FFXSR CPUID bit to an HVM guest. This patch allows HVM Windows x64 to install/boot on AMD-V platforms. This patches applies cleanly to xen-unstable 13743. Please apply to xen-unstable/3.0.5. If possible, pls apply to xen-3.0.4-testing. --Tom thomas.woller@amd.com AMD Corporation 5204 E. Ben White Blvd. UBC1 Austin, Texas 78741 +1-512-602-0059

>>> On 20.05.14 at 18:25, <mike at estone.ca> wrote: > I've added iommu=debug to the XEN CMD Line under grub. > Attached is the xl dmesg log and system dmesg. Okay, this at least clarifies there is a (relatively big) RMRR. There is a change to the handling of these among the ones that'll become 4.3.3 - mind giving

Intercept guest reads of MSR_IA32_MCG_CAP and limit the number of memory banks reported to one. This prevents us from trying to read status of non-existent banks when migrated to a machine with fewer banks. Signed-off-by: Ben Guthro Signed-off-by: David Lively <dlively@virtualiron.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com

...2593 rdmsr_normal: > 2594 /* Everyone can read the MSR space. */ > 2595 /* gdprintk(XENLOG_WARNING,"Domain attempted RDMSR > %p.\n", > 2596 _p(regs->ecx));*/ > 2597 if ( rdmsr_safe(regs->ecx, msr_content) ) > 2598 goto fail; > 2599 regs->eax = (uint32_t)msr_content; > 2600 regs->edx = (uint32_t)(msr_content >> 32); > 2601 break; Thanks. We can then pretty much rule out a connection of these with the issue at ha...

Changes from v1: - Define new struct hvm_trap to represent information of trap, include instruction length. - Renames hvm_inject_exception to hvm_inject_trap. Then define a couple of wrappers around that function for existing callers, so that their parameter lists actually *shrink*. This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP),

Ian Campbell <ijc at hellion.org.uk> writes: #What were the previous settings (the ones which worked for grub but not #Xen)? Do these new settings work with native Linux? # #Given the change in behaviour my gut feeling is that either the Legacy #USB Support option or the 60/64 emulation ones are the one which matters #out of that set. The default and previous settings were everything

...ct goto fail; if ( #ifdef CONFIG_X86_64 - (pci_probe & PCI_PROBE_MMCONF) && - (pci_probe & PCI_CHECK_ENABLE_AMD_MMCONF) ? + (pci_probe & PCI_PROBE_MASK) == PCI_PROBE_MMCONF ? val != msr_content : #endif ((val ^ msr_content) & _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel

...+++++- 1 files changed, 7 insertions(+), 1 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index cecc72f..879af58 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1815,6 +1815,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) { struct vcpu *v = current; u64 data = 0, host_data = 0; + unsigned int eax, ebx, ecx, edx; int r = 1; if ( !nestedhvm_enabled(v->domain) ) @@ -1925,8 +1926,13 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) data = X86_CR4_VMXE; bre...

...+1372,7 @@ static void virtual_vmexit(struct cpu_user_regs *regs) if ( cpu_has_vmx_virtual_intr_delivery ) nvmx_update_apicv(v); + nvcpu->nv_vmswitch_in_progress = 0; vmreturn(regs, VMSUCCEED); } @@ -1876,6 +1878,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) data = SECONDARY_EXEC_DESCRIPTOR_TABLE_EXITING | SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES | SECONDARY_EXEC_ENABLE_VPID | + SECONDARY_EXEC_UNRESTRICTED_GUEST | SECONDARY_EXEC_ENABLE_EPT; data = gen_vmx_msr(data, 0, host_...

This series of patches fix the mistake for debug exception(#DB), overflow exception(#OF) and INT3(#BP), INTn instruction emulation. Introduce new function vmx_inject_sw_exception() which deliver the software excetion, software interrupt and privileged software exception. Split hardware exception as a seperate function(old function vmx_inject_hw_exception()). Also Passed down intruction length

...1 - 1 files changed, 0 insertions(+), 1 deletions(-) diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index 8e005cd..55781e9 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -1334,7 +1334,6 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) case MSR_IA32_VMX_ENTRY_CTLS: /* bit 0-8, and 12 must be 1 (refer G5 of SDM) */ data = 0x11ff; - data |= VM_ENTRY_IA32E_MODE; data = (data << 32) | data; break; -- 1.7.0.4 _______________________________________________ Xen-devel mailing...

...y_control(v); vmx_update_exception_bitmap(v); nvmx_update_apic_access_address(v); + nvmx_update_virtual_apic_address(v); + nvmx_update_tpr_threshold(v); } static void load_shadow_guest_state(struct vcpu *v) @@ -1371,6 +1404,7 @@ int nvmx_msr_read_intercept(unsigned int msr, u64 *msr_content) CPU_BASED_ACTIVATE_MSR_BITMAP | CPU_BASED_PAUSE_EXITING | CPU_BASED_RDPMC_EXITING | + CPU_BASED_TPR_SHADOW | CPU_BASED_ACTIVATE_SECONDARY_CONTROLS; data = gen_vmx_msr(data, VMX_PROCBASED_CTLS_DEFAULT1, host_data...