search for: msp430

Hi Gents, For those of us with out-of-tree backends which are not 32bit, the msp430 backend is a useful vehicle for examining changes and testing out ideas. So I was wondering about enabling debug output on the MSP430 backend so that I can illustrate a few issues to Adrian and you on the variable pieces side. (there doesn't appear to be any specific person claiming the msp43...

...ffles.ll LLVM :: CodeGen/CellSPU/stores.ll LLVM :: CodeGen/CellSPU/struct_1.ll LLVM :: CodeGen/CellSPU/trunc.ll LLVM :: CodeGen/CellSPU/v2f32.ll LLVM :: CodeGen/CellSPU/v2i32.ll LLVM :: CodeGen/CellSPU/vec_const.ll LLVM :: CodeGen/CellSPU/vecinsert.ll LLVM :: CodeGen/MSP430/2009-05-10-CyclicDAG.ll LLVM :: CodeGen/MSP430/2009-05-17-Rot.ll LLVM :: CodeGen/MSP430/2009-05-17-Shift.ll LLVM :: CodeGen/MSP430/2009-05-19-DoubleSplit.ll LLVM :: CodeGen/MSP430/2009-08-25-DynamicStackAlloc.ll LLVM :: CodeGen/MSP430/2009-09-18-AbsoluteAddr.ll LLVM :: CodeG...

Hello, While trying to find out why the LDC compiler refuses to generate object code for MSP430 targets (but generates MSP430 assembly or LLVM IR/bitcode), I came across the following apparent inconsistency. This works: $ clang --target=msp430 -c test.c This doesn't work: $ clang --target=msp430 -S -emit-llvm test.c $ llc -filetype=obj test.ll /opt/msp430/bin/llc: target does not supp...

Hello, I have a user asking about msp430 support for Zig. When they try to target msp430, this error is triggered: if (target_machine->addPassesToEmitFile(MPM, dest, ft)) { *error_message = strdup("TargetMachine can't emit a file of this type"); return true; } I tried using clang...

There are LLVM 2.9 RC1 pre-release tarballs source available. You can find them here: http://llvm.org/pre-releases/2.9/ Please download them, build them, and compile things to your heart's content. And most importantly file a bunch of bug reports. :-) Share and enjoy! -bw

...gmail.com> wrote: > On 5 July 2017 at 17:51, Luís Marques via llvm-dev > <llvm-dev at lists.llvm.org> wrote: > > Cool. When I did that on macOS, LDC generated a lot of complaints, > possibly > > because it is assuming mach-o files. I tried changing from > -mtriple=msp430 > > to -mtriple=msp430-unknown-elf, to no avail. E.g.: > > Clang has a bunch of complicated logic to find the correct assembler > if it's installed (in this case I'd expect "msp430-unknown-elf-as"). > It's quite possible LDC doesn't have this since its ma...

On Thu, Jul 6, 2017 at 1:35 AM, Nicholas Wilson < iamthewilsonator at hotmail.com> wrote: > Luís, try using the -no-integrated-as flag to execute the assembler for > you. > We should probably make that the default for MSP430. > Cool. When I did that on macOS, LDC generated a lot of complaints, possibly because it is assuming mach-o files. I tried changing from -mtriple=msp430 to -mtriple=msp430-unknown-elf, to no avail. E.g.: $ ldc2 -mtriple=msp430-unknown-elf -c -no-integrated-as qosd.d ldc-ad1c8f0.s:3:11: error:...

Hi everyone, inline asm code is like below: void test(unsigned short a) { asm("myinstr my16bitreg, %0"::"r"(a)); } I want it generate instruction "myinstr my16bitreg, r15" I execute llc test.bc -march = msp430 -o test.s then it reports "LLVM ERROR: Couldn't allocate input reg for constraint 'r' !" What's the reason? Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20091218/c43046c7/a...

Hello > inline asm code is like below: > > void test(unsigned short a) { >    asm("myinstr          my16bitreg, %0"::"r"(a)); > } > I want it generate instruction "myinstr          my16bitreg, r15" > > I execute > llc test.bc -march = msp430 -o test.s > then it reports > "LLVM ERROR: Couldn't allocate input reg for constraint 'r' !" Works for me. Make sure you're using latest LLVM trunk. inline asm for msp430 were not available with 2,6 release iirc. -- With best regards, Anton Korobeynikov Faculty of...

Hello, Yesterday I noticed that MSP430 argument passing is broken in trunk; see http://llvm.org/PR6573 for details and testcases. The problem is that calls aren't being preceded by instructions that put the arguments into registers. I backtracked my working copy and then stepped forward until it broke between r98937 and r98938. R...

Hello, Several people have expressed interest in using LLVM to target MSP430 microcontrollers. Anton wrote an MSP430 backend as an exercise, and some of the nastiest parts are done (thanks Anton!), but the consensus seems to be that there's still quite a bit of work left to do before LLVM can replace the commercial and open-source compilers (IAR, CCE, CrossWorks, mspgc...

On Fri, Jun 11, 2010 at 2:55 PM, Ben Ransford <ransford at cs.umass.edu> wrote: > Yesterday I noticed that MSP430 argument passing is broken in trunk; > see http://llvm.org/PR6573 for details and testcases.  The problem is > that calls aren't being preceded by instructions that put the > arguments into registers.  I backtracked my working copy and then > stepped forward until it broke between r...

Hi David, Thank you for your patience but I still don’t get it: I don’t see how that is a “command”, as it’s just a list of strings that state command options. I know how to use the debugger, this is what I attempt to debug: clang --target=msp430 -emit-llvm -c -S -Oz main.c The debugger works fine, but only on the main thread. However breakpoints do not work with the code that was invoked as a child process with posix_spawn The call to posix_spawn happens in file “Program.inc” on the ‘Execute' function. The actual call is this Er...

...the MC6809 (and HD6309 as a dub target) processors. I'll also want to eventually provide direct support for the AM9511 floating-point coprocessor as an option. I'm working with bleeding-edge code from the Git mirror. I've made some pretty decent progress; I copied the llvm/lib/Targets/MSP430 Target to llvm/lib/targets/MC6809, changed all references to MSP430 to MC6809 ones, and went through the rest of the code mechanically creating MC6809 entries wherever there was an MSP430 one. Similarly in llvm/tools/clang/... I then butchered the MC6809.td file, the register description .td file,...

...machine instructions that are selected from the two nodes to be scheduled consecutively? I'm trying to implement code generation for SELECT_CC nodes in a back end that I'm working on. The compare operations on the architecture communicate via bits in a global status register, much like on MSP430. In fact, I've modeled my implementation after that of the MSP430. So I have custom target nodes akin to MSP430cmp and MSP430selectcc and pseudo-instructions like MSP430::Select16. The back end lowers SELECT_CC nodes to MSP430cmp/MSP430selectcc pairs that are linked together by Flag values. The...

On Aug 14, 2012, at 2:05 PM, Steve Montgomery <stephen.montgomery3 at btinternet.com> wrote: > Further to my earlier question, I'm perhaps a bit confused about memory serialisation. The following example, compiled using clang for the MSP430: > > target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16" > target triple = "msp430-??-??" > > @y = common global i16 0, align 2 > @x = common global i16 0, align 2 > > define void @f() nounwind { > entry: > %0 = load i16* @y, al...

Who is a code owner for MSP430 target? I know that a lot of work on this target is done by Anton Korobeynikov (aka asl) but he is not listed as a code owner in CODE_OWNERS.TXT. I would like to get my D20162 reviewed, but I don't know who I can add as a reviewer.

Hi David, Thank you for your help. Please, can you elaborate on this?. The command line that I get with -### starts with this: clang version 9.0.1 (https://github.com/llvm/llvm-project.git 6e38ee067b8fa08792f551fb565bbb8ada4864b1) Target: msp430 Thread model: posix InstalledDir: /Users/joan/LLVM-9/llvm-project/build/Debug/bin "/Users/joan/LLVM-9/llvm-project/build/Debug/bin/clang" "-cc1" "-triple" "msp430" "-emit-llvm" "-disable-free" "-main-file-name" "main.c&quot...

Hi everyone, I am puzzled by several instruction defines in MSP430. 1 def MOV16rr : Pseudo<(outs GR16:$dst), (ins GR16:$src), "mov.w\t{$src, $dst}", [ ]>; Because it's an empty dag pattern[ ], by what does instuction selector select intruction 'MOV16rr'? 2 let canFoldAsLoad = 1, isReMaterial...

Hi, 1. This instruction is not selected automatically by the instruction selector. The instruction combine / select stages insert registercopies, and they are expanded later on by the copyRegToReg() function provided by the MSP430InstrInfo to this MOV16rr. 2. ReMaterializable means there is no need to find a way to preserve the value in a register : the instruction can be just be reissued whenever the value is needed. This remove some pressure on register alloc, and avoid unnecessary spilling. 3. It says that beside doing...