search for: msb

Hi there colleagues, atapci3: <nVidia nForce MCP55 SATA300 controller> port 0xbc00-0xbc07,0xb880-0xb883,0xb800-0xb807,0xb480-0xb483,0xb400-0xb40f mem 0xefcb3000-0xefcb3fff irq 23 at device 5.2 on pci0 atacontrol detach ata7 - insert ATA disk (ad14) atacontrol attach ata7 pinics with Fatal trap 12: page fault while in kernel mode (kgdb) bt #0 doadump () at pcpu.h:196 #1 0xc0533227

...ES fax file (204xx98): lowres:/var/spool/asterisk/fax-out# tiffinfo FAX68.TIF TIFF Directory at offset 0x9160 Image Width: 1728 Image Length: 1173 Resolution: 204, 98 pixels/inch Bits/Sample: 1 Compression Scheme: CCITT Group 3 Photometric Interpretation: min-is-white FillOrder: lsb-to-msb Samples/Pixel: 1 Rows/Strip: 1173 Planar Configuration: single image plane Page Number: 0-3 Group 3 Options: EOL padding (4 = 0x4) TIFF Directory at offset 0x11eb6 Image Width: 1728 Image Length: 1173 Resolution: 204, 98 pixels/inch Bits/Sample: 1 Compression Scheme: CCITT Group 3...

Hello Monty, Sorry for the wrong subject title last time. A little more clarification needed. When reading bit-by-bit, there is no MSb/LSb, just 'first bit' and 'last bit'. The Huffman tree is traversed from 'first bit' to last bit'. This is a conceptual layer above the bitpacker; all you need to know is what order the bits come out, which happens to be LSb-first. For ex. say we have the following co...

...RCS file: /cvs/src/usr.bin/ssh/bufaux.c,v retrieving revision 1.24 diff -u -r1.24 bufaux.c --- bufaux.c 26 Mar 2002 15:23:40 -0000 1.24 +++ bufaux.c 19 Apr 2002 12:55:29 -0000 @@ -137,10 +137,18 @@ BN_bin2bn(bin, len, value); xfree(bin); } - /* - * Returns an integer from the buffer (4 bytes, msb first). + * Returns integers from the buffer (msb first). */ + +u_short +buffer_get_short(Buffer *buffer) +{ + u_char buf[2]; + buffer_get(buffer, (char *) buf, 2); + return GET_16BIT(buf); +} + u_int buffer_get_int(Buffer *buffer) { @@ -158,8 +166,16 @@ } /* - * Stores an integer in the bu...

...RCS file: /cvs/src/usr.bin/ssh/bufaux.c,v retrieving revision 1.24 diff -u -r1.24 bufaux.c --- bufaux.c 26 Mar 2002 15:23:40 -0000 1.24 +++ bufaux.c 19 Apr 2002 12:55:29 -0000 @@ -137,10 +137,18 @@ BN_bin2bn(bin, len, value); xfree(bin); } - /* - * Returns an integer from the buffer (4 bytes, msb first). + * Returns integers from the buffer (msb first). */ + +u_short +buffer_get_short(Buffer *buffer) +{ + u_char buf[2]; + buffer_get(buffer, (char *) buf, 2); + return GET_16BIT(buf); +} + u_int buffer_get_int(Buffer *buffer) { @@ -158,8 +166,16 @@ } /* - * Stores an integer in the bu...

...- cbind(sqdata, (spiderdata[j] - mean(spiderdata[j])) ^ 2) } sqdata N = 0 for(j in 1:J) { N = N + length(sqdata[[j]]) } SSW = sum(sqdata) MSW = SSW / (N - J) SSB = 0 for(j in 1:(length(spiderdata))) { SSB = SSB + length(spiderdata[[j]]) * ((mean(spiderdata[j])[[1]] - (sum(spiderdata) / N)) ^ 2) } MSB = SSB / (J - 1) F = MSB / MSW f_prob = pf(F, J - 1, N - J) reject_point = qf(.95, J - 1, N - J) cat("SSW:", SSW, ", MSW:", MSW, ", SSB:", SSB, ", MSB:", MSB, ", F:", F, ", P(F):", f_prob, ", P(", reject_point, ") = .95\n&q...

The value of ACPI PM-Timer may be broken on save unless the timer mode is delay_for_missed_ticks. With other timer modes, vcpu->arch.hvm_vcpu.guest_time is always zero and the adjustment from its value is wrong. This patch fixes the saved value of ACPI PM-Timer: - don''t adjust the PM-Timer if vcpu->arch.hvm_vcpu.guest_time is zero. - consolidate calculations of PM-Timer to one

...rs are named A, H, L, D, E and some more. 16 bit registers are HL (composed of H + L), DE (D + E) - and some more - with L and E being the low bits (LSB). For SEXT from 8 to 16 bit, here are the rules to do it efficiently: 8 bit reg -> 16 bit reg Fast extension: L HL, by making MSB (H) = 0/255 E DE, by making MSB (D) = 0/255 Slow (costly) extension: H HL or DE, by making LSB (D or L) = H and MSB (H) = 0/255 D same as above Reg "A" doesn't have a 16 bit register pair, so SEXT must always done as a "slow" operati...

Hello, I am experiencing problems, when trying to assemble these two x86-64 Opcodes "add r64, imm32" "imul r64, r64, imm32" When having the most significant bit set for imm32, for example: "add rax, 0x80000000", "add rax, 0xffffffff", ... "imul rbx, rsi, 0x80000000", "imul rbx, rsi, 0xffffffff", ... The Error Message I receive is the

Patch extracts MSB/LSB info from /bin/file output and passes it as separate parameret from elf_arch. Then it is sent to impl_file_architecture and checked/ Modified magic_for_file to handle regex changes. Now with tests for file_architecture. Fixes: RHBZ#1211996 Maros Zatko (2): inspector: recognize ppc64 and p...

...indows, Linux, Mac OS X) computers. We have a DHCP, which delivers the WINS-Server address to the clients. I don't have access to the clients. The problem is, that the WINS-Server (Samba 3.0.27) looses the Master-Browser election irregulary. I can't configure Samba a way, that it keeps the MSB. Example from the log.nmbd: === [2008/06/09 22:15:45, 0] nmbd/nmbd_incomingdgrams.c:process_local_master_announce(309) process_local_master_announce: Server GUERO at IP 10.0.80.221 is announcing itself as a local master browser for workgroup WODANLAN and we think we are master. Forcing election....

...ml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/daemon/filearch.ml b/daemon/filearch.ml index b2c30ae87..a892ba851 100644 --- a/daemon/filearch.ml +++ b/daemon/filearch.ml @@ -25,7 +25,7 @@ open Unix_utils open Utils let re_file_elf = - PCRE.compile "ELF (\\d+)-bit (MSB|LSB).*(?:executable|shared object|relocatable), (.+?)," + PCRE.compile "ELF (\\d+)-bit (MSB|LSB).*(?:executable|shared object|relocatable)(?:,)? ([^,]+?)," let re_file_elf_ppc64 = PCRE.compile ".*64.*PowerPC" -- 2.14.3

This patch supplies software IEEE floating point support. The comment from the patch reproduced below says all there is to say. This patch contains the prior "cleanup" patch; please don't apply that one. Please let me know of any bugs. It is tested reasonably well, but until I put together random tests it's hard to have 100% confidence. Neil. /* A self-contained host- and

Thomas, Have spoken to Soren, from my bootlog he believes that the problem is in atapicam causing the system to lock up. He is happy to answer some questions but doesnt have time to delve into atapicam himself. Did you author atapicam, I have seen your name on the sourcecode, can you help me further? Whats next? Thanks Adam. -------------- next part -------------- An embedded message was

Hi, I asked some days ago how to guess the o.s. the machine is running. I found that it is stored in a variable called R_PLATFORM. Now I need a full list of all the values this variable can have because I need to set an option depending on the endianness of the platform in which we are compiling the package. Anyone can help me? Thanks, Virgilio Gómez Rubio Dpto. Estadística e

...ITE CKSUM APP1 ONLINE 0 0 0 c4t600C0FF0000000000B1F6138A0BD8801d0 ONLINE 0 0 0 errors: Permanent errors have been detected in the following files: /zones/cctsprod/root/ccts/grid_agent/app/agent10g/network/mesg/tnsus.msb /zones/cctsprod/root/ccts/grid_agent/app/agent10g/rdbms/mesg/oraus.msb /zones/cctsprod/root/ccts/grid_agent/app/agent10g/perl/lib/5.8.3/sun4-solaris-thread-multi/auto/Socket/Socket.so /zones/cctsprod/root/ccts/grid_agent/app/agent10g/lib32/libnmefsql.so /zones/cctspr...

...easy to generate {32-bit,64-bit} x {big-endian,little-endian} tests. --- !ELF FileHeader: Class: ELFCLASS[[BITS]] Data: ELFDATA2[[ENCODE]] Type: ET_DYN Machine: EM_X86_64 # RUN: yaml2obj -D BITS=32 -D ENCODE=LSB %s -o %t.32le # RUN: yaml2obj -D BITS=32 -D ENCODE=MSB %s -o %t.32le # RUN: yaml2obj -D BITS=64 -D ENCODE=LSB %s -o %t.64le # RUN: yaml2obj -D BITS=64 -D ENCODE=MSB %s -o %t.64be See https://reviews.llvm.org/D73828 for examples how -D simplifies tests. Do people think it may be useful in other YAML tools? If yes, I'll move the yaml2obj implementa...

...f none. */ @@ -67,10 +69,12 @@ struct uart_driver { }; /* ''Serial handles'' are composed from the following fields. */ -#define SERHND_IDX (1<<0) /* COM1 or COM2? */ -#define SERHND_HI (1<<1) /* Mux/demux each transferred char by MSB. */ -#define SERHND_LO (1<<2) /* Ditto, except that the MSB is cleared. */ -#define SERHND_COOKED (1<<3) /* Newline/carriage-return translation? */ +#define SERHND_IDX (3<<0) /* COM1 or COM2? */ +# define SERHND_COM1 (0<<0) +# de...

Hello, Sometime ago min rsa key length was increased to 1024 bit and i have a little understanding problem with this. I hope somebody with some crypto-experience can enlighten me. To make that clear, that is not about allowing lower keys in general. Personally i would tend to use even longer keys(2048bit+). However Due nature of RSA-algorithm in case of 1024bit this might result in a key

...n, I think it would really be a lot more valuable to define it as returning all 1's or all 0's per element. Just setting the most significant bit is pretty much worthless (someone correct me if I'm wrong). I checked and I couldn't actually find any instruction set that only sets the MSB when comparing vectors, except by actually doing just a subtract. Since people need full masks before they can do anything useful with it (requiring a shift or conditional replace) I was thinking why not make that part of VFCmp? Note that this change in VFCmp's definition won't break compat...