Displaying 8 results from an estimated 8 matches for "msa128dopnd".
2016 Jun 02
2
BPF backend with vector operations - error "Could not infer all types in, pattern!"
Hello.
I come back to this older thread.
Again, because of i64immSExt32 I receive TableGen error "Could not infer all types
in, pattern!" (exact details written below). So far I'm not able to generate selection
code with TableGen for the ADD_r* instructions, etc:
def i64immSExt32 : PatLeaf<(imm),
[{return
2016 Mar 18
2
Immediate operand for load instruction, in back end
...ng AsmString = !strconcat("mov $wd, ($addrsrc)");
list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addrsrc)))];
InstrItinClass Itinerary = itin;
string DecoderMethod = "DecodeMSA128Mem";
}
class LD_D_DESC : LD_DESC_BASE<"ldvd", load, v32i16, MSA128DOpnd>;
I've tried to change mem_msa to hold only let MIOperandInfo = (ops simm10) but there
are problems it seems:
// MSA specific address operand
def mem_msa : mem_generic {
let MIOperandInfo = (ops ptr_rc, simm10);
let EncoderMethod = "getMSAMemEncoding";
}
Could you pl...
2016 Dec 11
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...attern = [(set ROWD:$wd, (TyNode (masked_gather ROWSP:$wsp, VK128Opnd
:$wsm, ROWSI:$wsptr, ROWSI:$wsi)))];
InstrItinClass Itinerary = itin;
string DecoderMethod = "DecodeMSA128Mem";
}
class LD_INDIRECT_D_DESC2 : LD_INDIRECT_DESC_BASE2<"read", v128i16, MSA128DOpnd>;
class LD_INDIRECT_D_ENC2 : MSA_2R_FMT<0b101001110>;
def LD_INDIRECT_D2: LD_INDIRECT_D_ENC2, LD_INDIRECT_D_DESC2;
/*
// From http://llvm.org/docs/doxygen/html/SelectionDAGNodes_8h_source.html:
02115 // In the both nodes address is Op1, mask is Op2:...
2016 Dec 15
2
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...er
> ROWSP:$wsp, VK128Opnd:$wsm, vectoraddr:$wsi))];
>
> InstrItinClass Itinerary = itin;
> string DecoderMethod = "DecodeMSA128Mem";
> }
> class LD_INDIRECT_D_DESC2 : LD_INDIRECT_DESC_BASE2<"read", MSA128DOpnd>;
> class LD_INDIRECT_D_ENC2 : MSA_3R_FMT<0b101001110>;
> def LD_INDIRECT_D2: LD_INDIRECT_D_ENC2, LD_INDIRECT_D_DESC2;
>
>
>
> Unfortunately, now I have another problem: llc fails when trying to select my
> masked_gather node. More exactly, it first...
2016 Dec 12
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
...(masked_gather
ROWSP:$wsp, VK128Opnd:$wsm, vectoraddr:$wsi))];
InstrItinClass Itinerary = itin;
string DecoderMethod = "DecodeMSA128Mem";
}
class LD_INDIRECT_D_DESC2 : LD_INDIRECT_DESC_BASE2<"read", MSA128DOpnd>;
class LD_INDIRECT_D_ENC2 : MSA_3R_FMT<0b101001110>;
def LD_INDIRECT_D2: LD_INDIRECT_D_ENC2, LD_INDIRECT_D_DESC2;
Unfortunately, now I have another problem: llc fails when trying to select my
masked_gather node. More exactly, it first tries to split it and then...
2016 Mar 22
0
Immediate operand for load instruction, in back end
...t;mov $wd, ($addrsrc)");
> list<dag> Pattern = [(set ROWD:$wd, (TyNode (OpNode Addr:$addrsrc)))];
> InstrItinClass Itinerary = itin;
> string DecoderMethod = "DecodeMSA128Mem";
> }
>
> class LD_D_DESC : LD_DESC_BASE<"ldvd", load, v32i16, MSA128DOpnd>;
>
>
> I've tried to change mem_msa to hold only let MIOperandInfo = (ops
> simm10) but there
> are problems it seems:
>
> // MSA specific address operand
> def mem_msa : mem_generic {
> let MIOperandInfo = (ops ptr_rc, simm10);
> let EncoderMethod = &qu...
2016 Dec 09
0
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hi Alex,
I don’t know too much about recent MIPS, but have recently been doing something similar for the new ARM SVE architecture, so hopefully this will get you closer to what you need:
If you’re looking where I think you are (lib/Target/X86/X86InstrAVX512.td), ‘GatherNode’ is a template argument, not a definition.
It allows a PatFrag be passed into the avx512_gather multiclass definition.
2016 Dec 09
5
TableGen - Help to implement a form of gather/scatter operations for Mips MSA
Hello.
I read on page 4 of http://www.cs.fsu.edu/~whalley/cda5155/chap4.pdf that gather and
scatter operations exist for Mips, named LVI and SVI, respectively.
Did anyone think of implementing in the LLVM Mips back end (part of the MSA vector
instructions) gather and scatter operations?
If so, can you share with me the TableGen spec? (I tried to start from LD_DESC_BASE,
but it