search for: mry

Hi there! I have two date columns in a dataframe I need to selectively collapse based on missing values and which date comes first (imported from an text file). This is what I did: RHSSP$CT <- as.POSIXct(RHSSP$CT, format='%m/%d/%y %H:%M') RHSSP$MRI <- as.POSIXct(RHSSP$MRI, format='%m/%d/%y %H:%M') RHSSP$Scan <-

On Jun 13, 2012, at 10:49 AM, Sergei Larin <slarin at codeaurora.org> wrote: > So if this early exit is taken: > > // SSA defs do not have output/anti dependencies. > // The current operand is a def, so we have at least one. > if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end()) > return; > > we do not ever get to this point: > >

MachineRegisterInfo is maintaining a list of live-out registers for the MachineFunction. It contains the return value registers, and is typically created by XXXISelLowering::LowerReturn(). Various passes after instruction selection need to look at this list to determine which physical registers are live in return blocks. Eventually, the register allocators copy these live-out registers onto the

Andy, I traced my problem to this point: In ScheduleDAGInstrs.cpp we have the following function: /// addVRegDefDeps - Add register output and data dependencies from this SUnit /// to instructions that occur later in the same scheduling region if they read /// from or write to the virtual register defined at OperIdx. /// /// TODO: Hoist loop induction variable increments. This has to be ///

Patch for review. On Mon, Aug 21, 2017 at 11:45 PM Puyan Lotfi <puyan.lotfi.llvm at gmail.com> wrote: > Ping. > > Still working on preparing code for review. Will have a patch for review > ready in the coming days. > > PL > > On Tue, Aug 15, 2017 at 12:06 PM Puyan Lotfi <puyan.lotfi.llvm at gmail.com> > wrote: > >> Hi, >> >> >>

I've recently sync'd to a newer version of LLVM(Apple branch 2326 from Apple branch 2323.8) that changed the interface to addCommonCodeGenPasses which caused the default implementation to be executed instead of my overriding implementation. This default implementation has DeadMachineInstructionElim pass enabled, which is causing havoc with my backend. Before entering this pass, everything

Hi, I wanted to see the non-debug uses of register 0 (Noreg) and so, I wrote the following piece of code. ***** MRI = &MF.getRegInfo(); if (!MRI->use_nodbg_empty(0)) { for (MachineRegisterInfo::use_nodbg_iterator ri = MRI->use_nodbg_begin(0), re = MRI->use_nodbg_end(); ri != re; ++ri) { MachineInstr *UseMI = &*ri; UseMI->dump ();

This code or subtle variations of it appears in multiple targets. It tries to convert from a register to a register class using getRegClass, but getRegClass is really supposed to take a register class enum value and get the register class object for it. It doesn't convert a register to a class. In fact there's not always a single or canonical class for a given register. What is the right

On Apr 14, 2010, at 1:55 PMPDT, Villmow, Micah wrote: > I’ve recently sync’d to a newer version of LLVM(Apple branch 2326 from Apple branch 2323.8) that changed the interface to addCommonCodeGenPasses which caused the default implementation to be executed instead of my overriding implementation. This default implementation has DeadMachineInstructionElim pass enabled, which is causing havoc

Hello, I'm trying to migrate openldap users to a samba+ldap solution. I had set up the samba+ldap server succesfully, and restored my accounts via smbldap-populate and an ldif file. But all my LDAP accounts didn't got all the samba field and i'm forced to update it manually via smbldap-usermod -a %user and smbldap -u %user ( and typing a new password ). So my question is : Wich is

Dale, Yeah that is correct, so that isn't the problem, not sure why I was thinking it is. The !MRI->use_no_dbg_empty(Reg) seems to be correct and the problem is LivePhysRegs[Reg] always returning false. I've looked into this more and there is a part where I'm working with physical registers. If there is a function call, there is a copy from virtual register space to the functions

Andy, You are probably right here - look at this - before phi elimination this code looks much more sane: # *** IR Dump After Live Variable Analysis ***: # Machine code for function push: SSA Function Live Outs: %R0 BB#0: derived from LLVM BB %entry %vreg5<def> = IMPLICIT_DEF; IntRegs:%vreg5 %vreg4<def> = TFRI_V4 <ga:@xx_stack>; IntRegs:%vreg4

llvm-dev, Thanks so much in advance for any help, tips, or advice you may be able to offer me. I'm going to try to avoid the big-picture description of the project I'm working on, and only talk about the parts that I have trouble with / currently need to implement. -- I've been starting by taking the source code from the "llvm-mc" tool, and working that down into a

Andy, Thanks for reply. I was able to trace the problem to the MI DAG dep constructor. See this: SU(0): %vreg1<def> = COPY %vreg10<kill>; IntRegs:%vreg1,%vreg10 # preds left : 0 # succs left : 0 # rdefs left : 1 Latency : 1 Depth : 0 Height : 0 SU(1): %vreg10<def> = LDriw %vreg9<kill>, 0;

Hey all, I've found a bug in either the PBQP register allocator or in VirtRegRewriter. I'm observing this assertion in VirtRegRewriter::rewrite() fail: unsigned VirtReg = MO.getReg(); unsigned PhysReg = VRM->getPhys(VirtReg); ... assert(!MRI->isReserved(PhysReg) && "Reserved register assignment"); Indeed there is a case where

Hello, We''ve been migrating our fairly large Rails 1.2 application from MRI 1.8.6 to REE 1.8.7, and in the process we''ve encountered some fairly odd behavior. Namely, instead of the expected reduction in memory usage, we''re seeing an increase in memory usage by around 40% and, along with it, an increase in processor usage. The stock 1.8.7 implementation performs

Heya all, Anyone have any ideas on this one? http://rubyforge.org/tracker/index.php?func=detail&aid=13825&group_id=85&atid=411 It''s easy enough to rescue, I''d just like to know what MRI does in this case, so we can duplicate it. Regards, Dan

Hi, This came up in https://reviews.llvm.org/D38569, and I'd like some input on what's the best way to get alias and mod-ref info without having two alias calls. A couple of ideas: (a) Extend the getModRefInfo interface (+getModRefBehavior, +gerArgModRefInfo) to return a pair {ModRefInfo, AliasResult}. The AliasResult can be optional based on an argument e.g.: struct MRI_AR {

Lang, I think I am getting closer to understanding this. The findLastUseBefore() should probably look something like this: // Return the last use of reg between NewIdx and OldIdx. SlotIndex findLastUseBefore(unsigned Reg, SlotIndex OldIdx) { SlotIndex LastUse = NewIdx; if (TargetRegisterInfo::isPhysicalRegister(Reg)) { for (MCRegUnitRootIterator Roots(Reg,

We''ve run into this before and, in this particular project, I''m positive we had a hack somewhere to get AR to work but it seems to have gone missing and I''m not finding any hints in git history or Google. Any call to an AR.create will trigger it. Seems like a strategically placed require or include did the trick but I''m probably misremembering. The offending