search for: movsb

Displaying 20 results from an estimated 45 matches for "movsb".

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2013 Dec 14
4
[PATCH 1/2] Match comment with code
The handover protocol uses ED as partition type but the comment above it still mentions EE Signed-off-by: Ruben Kerkhof <ruben at rubenkerkhof.com> --- mbr/gptmbr.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S index 7f450d3..8ab6b50 100644 --- a/mbr/gptmbr.S +++ b/mbr/gptmbr.S @@ -194,7 +194,7 @@ found_part: pushw %di /* 80 00 00 00
2011 Feb 27
0
[LLVMdev] TableGen syntax for matching a constant load
...e reasonably easy to add a new "optsize2" function attribute to LLVM IR, and have that be set with -Oz (the "optimize for size at any cost") flag, which could then enable stuff like this. There are lots of other cases where this would be useful, such as forced use of "rep; movsb" on x86, which is much smaller than a call to memset, but also much slower :). -Chris
2008 Jul 07
1
bug on x86 in usr/klibc/memmove.c
Hello guys, this: asm volatile("std ; rep ; movsb" is not such a great idea without the corresponding cld at the end ;), it'll cause all kinds of funny memory corruption later (in my case i had to debug v86d to find the culprit). cheers, PaX Team
2013 Dec 29
2
[PATCH 2/2] Remove some whitespace
...1 insertion(+), 1 deletion(-) > > diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S > index 8ab6b50..7d98aee 100644 > --- a/mbr/gptmbr.S > +++ b/mbr/gptmbr.S > @@ -213,7 +213,7 @@ found_part: > > movzwl %cx,%eax /* Length of GPT entry */ > stosl > - > + > rep; movsb /* GPT entry follows MBR entry */ > popw %si > The removal of that trailing tab character is valid change. What is needed to get the patch applied in the leading git repository? Groeten Geert Stappers -- Leven en laten leven
2011 Feb 27
3
[LLVMdev] TableGen syntax for matching a constant load
On Feb 26, 2011, at 4:50 PM, Joerg Sonnenberger wrote: > On Sun, Feb 27, 2011 at 01:29:25AM +0100, Joerg Sonnenberger wrote: >> +let Predicates = [OptForSize] in { >> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>; >> +def : Pat<(store (i32 0), addr:$dst), (AND32mi8 addr:$dst, 0)>; >> +def : Pat<(store (i64 -1), addr:$dst), (OR64mi8
2016 Oct 15
2
How to remove memcpy
Even with -ffreestanding LLVM generates memcpy/memset? Does this mean some passes do not honor this flag? If you really wanted to prevent libcalls, you could technically translate those memcpy/memset to loops in lowering. Kevin On Sat, Oct 15, 2016 at 4:10 PM, Wolfgang McSneed via llvm-dev < llvm-dev at lists.llvm.org> wrote: > Hi Mehdi and Joerg, > > Thanks for your fast
2013 Dec 15
3
[PATCH 1/2] Match comment with code
...tch and submit it again to the mailinglist. Groeten Geert Stappers -- $ git diff -U5 mbr/gptmbr.S diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S index 7f450d3..327cfa1 100644 --- a/mbr/gptmbr.S +++ b/mbr/gptmbr.S @@ -191,12 +191,12 @@ found_part: xchgw %ax,%cx /* Set up %cx for rep movsb further down */ movw $dssi_out,%di pushw %di - /* 80 00 00 00 ee 00 00 00 - - bootable partition, type EFI (EE), no CHS information */ + /* 80 00 00 00 ed 00 00 00 + - bootable partition, type EFI (ED), no CHS information */ xorl %ea...
2006 Aug 14
4
[PATCH] HVM SMBIOS v3 [5/5]
...+ push si + + mov cx, #0x001f ; 0x1f bytes to copy + mov ax, #0xf000 + mov es, ax ; destination segment is 0xf0000 + mov di, smbios_entry_point ; destination offset + mov ax, #0x9f00 + mov ds, ax ; source segment is 0x9f000 + mov si, #0x0000 ; source offset is 0 + cld + rep + movsb + + pop si + pop di + pop ds + pop es + pop cx + pop ax + + ret + +#endif + + + ;; for ''C'' strings and other data, insert them here with ;; a the following hack: ;; DATA_SEG_DEFS_HERE @@ -9724,6 +9761,7 @@ post_default_ints: #ifdef HVMASSIST call _copy_e820_table +...
2016 Oct 31
1
COMPILER-RT build break
...ot;, "rcx", "memory"); \ ^ /home/mzuckerm/llvm23/llvm/projects/compiler-rt/lib/asan/tests/asan_asm_test.cc:129:1: error: asm-specifier for input or output variable conflicts with asm clobber list DECLARE_ASM_REP_MOVS(U1, "movsb"); ^ /home/mzuckerm/llvm23/llvm/projects/compiler-rt/lib/asan/tests/asan_asm_test.cc:65:15: note: expanded from macro 'DECLARE_ASM_REP_MOVS' : "rsi", "rdi", "rcx", "memory"); \ ^ /h...
2005 Jun 05
2
pxelinux and DISPLAY
I've begun tinkering with syslinux v3 and have uncovered an anomoly with the DISPLAY file when called by pxelinux.0. If I have: DISPLAY boot.msg With an "^Xsplash.lss\n" in the file boot.msg (exactly: 18 73 70 6C 61 73 68 2E 6C 73 73 0A) file, it will fail to load the rle image. And produce some goofy results in the tftpd log: Jun 5 06:27:06 pxe in.tftpd[24649]: RRQ from
2017 Oct 04
0
[PATCH 09/13] x86/asm: Convert ALTERNATIVE*() assembler macros to preprocessor macros
...cx diff --git a/arch/x86/lib/memmove_64.S b/arch/x86/lib/memmove_64.S index 15de86cd15b0..ca6c39effa2f 100644 --- a/arch/x86/lib/memmove_64.S +++ b/arch/x86/lib/memmove_64.S @@ -42,7 +42,8 @@ ENTRY(__memmove) jg 2f .Lmemmove_begin_forward: - ALTERNATIVE "", "movq %rdx, %rcx; rep movsb; retq", X86_FEATURE_ERMS + #define ERMS_MOVSB_RET movq %rdx, %rcx; rep movsb; retq + ALTERNATIVE(, ERMS_MOVSB_RET, X86_FEATURE_ERMS) /* * movsq instruction have many startup latency diff --git a/arch/x86/lib/memset_64.S b/arch/x86/lib/memset_64.S index 55b95db30a61..d86825a11724 100644...
2011 Feb 21
2
[LLVMdev] Passing structures as pointers, MSVC x64 style
...sp),%rax c: 48 8d 0d 00 00 00 00 lea 0x0(%rip),%rcx # 13 <byValue+0x13> 13: 48 8b f8 mov %rax,%rdi 16: 48 8b f1 mov %rcx,%rsi 19: b9 10 00 00 00 mov $0x10,%ecx 1e: f3 a4 rep movsb %ds:(%rsi),%es:(%rdi) 20: 48 8d 54 24 20 lea 0x20(%rsp),%rdx 25: b9 01 00 00 00 mov $0x1,%ecx 2a: e8 00 00 00 00 callq 2f <byValue+0x2f> 2f: 48 83 c4 38 add $0x38,%rsp 33: 5f pop %...
2011 Nov 24
0
[PATCH 4/6] X86: Disable PCID/INVPCID for pv
...efine X86_FEATURE_SSE4_2 20 /* Streaming SIMD Extensions 4.2 */ @@ -132,5 +133,6 @@ #define X86_FEATURE_SMEP 7 /* Supervisor Mode Execution Protection */ #define X86_FEATURE_BMI2 8 /* 2nd group bit manipulation extensions */ #define X86_FEATURE_ERMS 9 /* Enhanced REP MOVSB/STOSB */ +#define X86_FEATURE_INVPCID 10 /* Invalidate Process Context ID */ #endif /* __LIBXC_CPUFEATURE_H */ diff -r 0b15aa9541dc tools/libxc/xc_cpuid_x86.c --- a/tools/libxc/xc_cpuid_x86.c Thu Nov 17 18:41:59 2011 +0800 +++ b/tools/libxc/xc_cpuid_x86.c Thu Nov 17 23:09:45 2011 +0800 @@ -4...
2013 Dec 14
0
[PATCH 2/2] Remove some whitespace
...benkerkhof.com> --- mbr/gptmbr.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S index 8ab6b50..7d98aee 100644 --- a/mbr/gptmbr.S +++ b/mbr/gptmbr.S @@ -213,7 +213,7 @@ found_part: movzwl %cx,%eax /* Length of GPT entry */ stosl - + rep; movsb /* GPT entry follows MBR entry */ popw %si -- 1.8.4.2
2013 Dec 15
0
[PATCH 1/2] Match comment with code
...eten > Geert Stappers > > -- > $ git diff -U5 mbr/gptmbr.S > diff --git a/mbr/gptmbr.S b/mbr/gptmbr.S > index 7f450d3..327cfa1 100644 > --- a/mbr/gptmbr.S > +++ b/mbr/gptmbr.S > @@ -191,12 +191,12 @@ found_part: > xchgw %ax,%cx /* Set up %cx for rep movsb further down */ > > movw $dssi_out,%di > pushw %di > > - /* 80 00 00 00 ee 00 00 00 > - - bootable partition, type EFI (EE), no CHS information */ > + /* 80 00 00 00 ed 00 00 00 > + - bootable partition, type EFI (ED), n...
2013 Dec 30
0
[PATCH 2/2] Remove some whitespace
...r.S b/mbr/gptmbr.S >> index 8ab6b50..7d98aee 100644 >> --- a/mbr/gptmbr.S >> +++ b/mbr/gptmbr.S >> @@ -213,7 +213,7 @@ found_part: >> >> movzwl %cx,%eax /* Length of GPT entry */ >> stosl >> - >> + >> rep; movsb /* GPT entry follows MBR entry */ >> popw %si >> > > The removal of that trailing tab character is valid change. > > What is needed to get the patch applied in the leading git repository? It has been applied to master. I believe there are a fe...
2004 Jul 01
0
[LLVMdev] Operand constraints
Vladimir Prus wrote: > On my target, the multiplication can involve all general purpose registers, > but there's are still some restrictions: the first and the second operand > as well as the result must be in different registers, and neither register > can be gr7. How can I enforce this restriction on the register allocator? And the other side of the question is now to inform
2005 Jul 07
0
pxelinux and DISPLAY
...er Anvin - All Rights Reserved @@ -345,9 +345,12 @@ mov [fs:kern_cmd_offset],di ; Store pointer mov cx,[CmdLineLen] - add cx,byte 3 - shr cx,2 ; Convert to dwords - fs rep movsd + cmp cx,255 + jna .len_ok + mov cx,255 ; Protocol < 0x202 has 255 as hard limit +.len_ok: + fs rep movsb + fs stosb ; Final null, note AL == 0 here push fs pop es
2004 Jul 01
3
[LLVMdev] Operand constraints
On my target, the multiplication can involve all general purpose registers, but there's are still some restrictions: the first and the second operand as well as the result must be in different registers, and neither register can be gr7. How can I enforce this restriction on the register allocator? - Volodya
2002 Aug 14
0
re: using mac-addr for selecting configfile now working
...ee or better try to integrate into stable release +; **************************************************************************** %define IS_PXELINUX 1 %include "macros.inc" @@ -692,22 +697,39 @@ mov si,cfgprefix mov cx,cfgprefix_len rep movsb - mov cx,8 - mov eax,[MyIP] + mov cx,6 ; 6 nibbles in vendor part of MAC + mov eax,[MyMAC1] ; 3 bytes vendor part of MAC + xchg ah,al ; Convert to host byte order +...