Displaying 5 results from an estimated 5 matches for "mostore".
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oostore
2018 Apr 17
1
How to create a proper MachineMemOperand?
Thanks for your advice. But I have searched X86 and find no more
information than I have known.
The problem is not to create a MachineMemOperand, but to create a
MachineMemOperand with certain address. This scene does not exist in the
original code.
Since I have to do this in the process of register allocating, inserting IR
instruction seems to be infeasible. I have thought of storing the address
2011 Jan 25
1
[LLVMdev] Trouble with virtual registers
...oc DL;
if (MI != MBB.end()) DL = MI->getDebugLoc();
MachineFunction &MF = *MBB.getParent();
MachineFrameInfo &MFI = *MF.getFrameInfo();
MachineMemOperand *MMO =
MF.getMachineMemOperand(PseudoSourceValue::getFixedStack(FrameIdx),
MachineMemOperand::MOStore, 0,
MFI.getObjectSize(FrameIdx),
MFI.getObjectAlignment(FrameIdx));
unsigned tmpVReg =
MF.getRegInfo().createVirtualRegister(OURTARGET::IntRegsRegisterClass);
MachineInstr* mi = BuildMI(MBB, MI, DL, get(OURTARGET::ADDri),
tmpVReg).addFram...
2013 Jan 18
0
[LLVMdev] llvm backend porting question ,
...Function &MF = *MBB.getParent();MF.dump();
MachineFrameInfo &MFI = *MF.getFrameInfo();
unsigned Align = MFI.getObjectAlignment(MVT::i8);
MachineMemOperand *MMO =
MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(MVT::i8),
MachineMemOperand::MOStore,
MFI.getObjectSize(MVT::i8),
Align);
BuildMI(MBB, MI, DL, get(Picoblaze::STORETOSTACK ));//.addMemOperand(MMO);
if (RC == &Picoblaze::GR8RegClass)
{
// BuildMI(MBB, MI, DL, get(Picoblaze::ADD8ri ))
// .addReg(Picoblaze::B...
2017 Oct 13
2
[SelectionDAG] Assertion due to MachineMemOperand flags difference.
Hello,
I've hit an assertion in SelectionDAG where we try to merge 2 loads
that have the same operands but their MMO flags differ. One is
dereferenceable and one is not. I'm not sure what the underlying issue
here is:
1) MDSDNode with the same operands should have the same flags set on
their respective MMO. The fact the flags differ when the
opcode,types,operands and address-space are
2012 Mar 30
1
[LLVMdev] load instruction memory operands value null
Hi,
For a custom target, there is a pass to perform memory dependence analysis, where, i need to get memory pointer for "load instruction". I want to check the pointer alias behavior. I am getting this by considering the memoperands for the load instruction.
For "load instruction", Machine Instruction dumps as below:
vr12<def> = LD_Iri %vr2<kill>, 0;