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...and a simple way of passing this information on from the vectoriser to the backend. I still might have skipped a few details here, but this is what it boils down to, and hopefully you've got a good impression of the problem. Cheers, Sjoerd. ________________________________ From: Zaks, Ayal (Mobileye) <ayal.zaks at intel.com> Sent: 21 May 2020 18:44 To: Sjoerd Meijer <Sjoerd.Meijer at arm.com>; Eli Friedman <efriedma at quicinc.com> Cc: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Subject: RE: [llvm-dev] LV: predication > The compare that we are talking i...

Interesting, thanks for digging this up! > As a consequence, any loop structure that is recognized > by SCEV will (/should) not profit from rewriting. As discussed in https://reviews.llvm.org/D68577#1742745 and PR40816 showed, there is still merit and profit in further simplifying loop induction variables, or at-least the primary one; somewhat independent of continuing to rely on SCEV for

...TC in the backend. As we are looking for the scalar loop iteration count, not the VIV, I don't think SCEV for vector loops is going to be helpful. Please let me know if I can elaborate further, or if things are not clear. Cheers, Sjoerd. ________________________________ From: Zaks, Ayal (Mobileye) <ayal.zaks at intel.com> Sent: 20 May 2020 20:39 To: Sjoerd Meijer <Sjoerd.Meijer at arm.com>; Eli Friedman <efriedma at quicinc.com> Cc: llvm-dev at lists.llvm.org <llvm-dev at lists.llvm.org> Subject: RE: [llvm-dev] LV: predication I realize this discussion and D79100 h...

Hi. My name is Gil Dogon and I am working in MobileEye using LLVM in order to generate code for a proprietary processor. Our processor architecture is very similar to MIPS, so I started to work using the "experimental" MIPS back end. Anyway, my question is rather simple but somehow I did not find a quick answer to it in the documentation. What I want to know, is how can the

Hi! Apparently there are no precompiled binaries for llvm-gcc 4.0 for Linux. I've tried downloading the sources and building according to http://llvm.org/docs/CFEBuildInstrs.html (except I'm not an elite gcc hacker). I tried following the guidelines and got what looks like a gcc for x86 with no traces of LLVM. I tried passing --enable-llvm with various llvm root pathnames and got ICEs.

Hi Eli, > The problem with your proposal, as written, is that the vectorizer is producing the intrinsic. Because we don’t impose any ordering on optimizations before codegen, every optimization pass in LLVM would have to be taught to preserve any @llvm.set.loop.elements.i32 whenever it makes any change. This is completely impractical because the intrinsic isn’t related to anything

Hello, I'm trying to cross compile version 1.8 of llvm using mingw32. I followed the instructions that are published in the site (at http://llvm.org/docs/GettingStarted.html). However, I no matter what I try I get the following error message: configure: WARNING: ***** llvm-gcc/llvm-g++ was not found, or does not appear to be configure: WARNING: ***** working. Please make sure you have

Sorry, I forgot to mention that I'm working with a legacy code that till now has been built on Linux and now needs to support Windows as well. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20081102/9e6b41ab/attachment.html> -------------- next part -------------- A non-text attachment was

OK , grepping the whole source tree for 'ctlz' I found the answer to my question in: test/FrontendC/2006-01-16-BitCountIntrinsicsUnsigned.c and that is to use gnu frontend style __builtin_clz() for this one. This test/FrontendC directory has a plethora of other usefull examples so I guess It will be sufficient for me. However I still think that some documentation of the frontend

I stumbled upon the following problem when truing to support the following non-standard instruction extensions to a MIPS like architecture: 1.) double store : Ri,Ri+1 are stored to the memory at address specified by (Rj). Here the instruction encoding includes only 'i' but it implicitly uses also Ri+1. I can define a special intrinsic for this in "C" such as

Hi! The LLVM Bytecode File Format specifies an optional SectionID attribute for globals. I didn't find a matching attribute in the LLVM source code. Code such as: int a __attribute__ ((section ("A_SECTION"))); compiles with llvm-gcc, but apparently the section information is stripped (the object file doesn't contain "A_SECTION"). Is the SectionID feature

Hi! Apparently llvm-gcc ignores #line directives in source files when generating debug information. When I compile this: //test int f(int a) { #line 1 "someplace" return a*a; } //end with `llvm -g -S lines.c`, `someplace' is not mentioned in lines.s. It also looks like functions #included from header files get attributed to the #including file (albeit at the right line number).

Hi! A (small) tar archive with files exposing an apparent LLVM optimizer bug is attached; I didn't find a way to attach files in the bugzilla interface. What's the best way to report bugs taking several files to reproduce? -- Yossi -------------- next part -------------- A non-text attachment was scrubbed... Name: bugreport.tgz Type: application/x-gtar Size: 2242 bytes Desc: not

After I'm adding to the my path llvm-gcc4-1.8-x86-linux/llvm-bin/ that contains llvm-gcc.exe and llvm-g++.exe I still get the same error message: configure: WARNING: ***** llvm-gcc/llvm-g++ was not found, or does not appear to be configure: WARNING: ***** working. Please make sure you have llvmgcc and llvmg++ in configure: WARNING: ***** your path before configuring LLVM. The runtime

Hi! I'm working on an LLVM back-end for a processor with a stack machine architecture. After experimenting with code generation directly from the LLVM representation, I'm studying the target-independant code generator. As far as I understand, there currently exists a target-independant infrastructure for legalization, instruction selection, scheduling and register allocation. It is clear

Chris Lattner wrote: > As others have mentioned, hacking the front-end isn't that hard. In > any case though, please be aware that a precompiled binary for a non- > MIPS target won't produce correct code if you are (for example) using > an x86 front-end and forcing llc to generate mips code with llc - > march=mips. The front-end does type layout and knows very ABI

Thanks, it helped :-) I'm now building the sources and apparently my mingw installation does not support pthread and therefore examples/ParallelJIT.cpp fails: make[2]: Entering directory `/c/llvm1.8/generated-llvm/obj/examples/ParallelJIT' llvm[2]: Compiling ParallelJIT.cpp for Debug build c:/llvm1.8/llvm/examples/ParallelJIT/ParallelJIT.cpp:20:21: pthread.h: No such file or

Hi Anton, But if I'm ignoring this warning and continue according to the instructions (i.e. copy back the saved tblgen and perform build as usual), then I get a LOT of linkage errors regarding undefined symbols. For instance, smWriterEmitter.cpp:(.text+0x21): undefined reference to `_ZNSs6assignERKSs' AsmWriterEmitter.cpp:(.text+0x39): undefined reference to `_ZNSs6assignERKSs'

Hello. I have a problem which is quite basic for array optimization, amd I wonder whether I am missing something, but I could not find the LLVM pass that does it. Consider the following code snippet: int test() { int mat[7][7][7]; int i,j,k,sum=0; for(i=0;i<7;i++){ for(j=0;j<7;j++){ for(k=0;k<7;k++){ sum+=mat[i][j][k]^mat[i][j][k^1]; } } } return

Luke Dalessandro wrote: > Gil, it's really easy to add builtins to the llvm-gcc frontend and have > them auto-magically converted to the llvm intrinsic versions. The main > problem with this is that you end up with a non-standard front end that > you have to somehow distribute to the people who need it. There may be > funny licensing problems, etc... I don't really