Displaying 3 results from an estimated 3 matches for "mo_lo".
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
...stom load/store which will generate the address using values
from two registers. We thought LUI and ADDI pair will be good to store the
values in a i32 register. If we could transform GlobalAddress<0xHighLow>
directly to GlobalAddress<0xLow>, we could use the present RISCVII::MO_HI
and MO_LO as they only exact the 32 high bits. What do you think?
Many thanks for your reply :)
On Tue, Jul 9, 2019 at 9:41 PM Tim Northover <t.p.northover at gmail.com>
wrote:
> On Tue, 9 Jul 2019 at 14:49, Reshabh Sharma via llvm-dev
> <llvm-dev at lists.llvm.org> wrote:
> > For a...
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
...abh Sharma <reshabhsh at gmail.com> wrote:
> > We thought LUI and ADDI pair will be good to store the values in a i32
> register.
>
> With you so far, I think. To be explicit, to materialize a full 64-bit
> pointer you'd need 4 instructions:
>
> lui rLO32, addr:MO_LO32_LO
> addi rLO32, rLO32, addr:MO_LO32_HI
> lui rHI32, addr:MO_HI32_LO
> addi rHI32, rLO32, addr:MO_LO32_HI
>
> or some variation for PIC etc.
>
> > If we could transform GlobalAddress<0xHighLow> directly to
> GlobalAddress<0xLow>, we could use th...
2019 Jul 09
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
Hello,
Brief background: We are trying to support 64 bit pointers in RISCV 32 bit
backend
http://lists.llvm.org/pipermail/llvm-dev/2019-June/132805.html
To pass the legalizer we plan to break the 64 bit GlobalAddress into 32 bit
GlobalAddress having the other 32 bit glued to the node. We could not find
a direct way to convert the 64 bit GlobalAddress Node into a 32 bit node.
For a GlobalAddress