Displaying 2 results from an estimated 2 matches for "mo_hi32_lo".
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
>
> I don't think there's a real shortage of those, but I confess I'm not
> sure why that's related. You'd need a representation for the LUI and
> ADDI after instruction selection anyway.
Yeah at the end we need a representation for LUI and ADDI. We were trying
to break the 64 bit address from GlobalAddress node into two i32 register.
We will add custom load/store
2019 Jul 11
2
Manipulating global address inside GlobalAddress SDNode in (RISCV) LLVM backend
...DI pair will be good to store the values in a i32
> register.
>
> With you so far, I think. To be explicit, to materialize a full 64-bit
> pointer you'd need 4 instructions:
>
> lui rLO32, addr:MO_LO32_LO
> addi rLO32, rLO32, addr:MO_LO32_HI
> lui rHI32, addr:MO_HI32_LO
> addi rHI32, rLO32, addr:MO_LO32_HI
>
> or some variation for PIC etc.
>
> > If we could transform GlobalAddress<0xHighLow> directly to
> GlobalAddress<0xLow>, we could use the present RISCVII::MO_HI and MO_LO as
> they only exact the 32 high bits. What do...